| /art/compiler/dex/quick/arm64/ |
| D | assemble_arm64.cc | 116 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
134 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
176 kFmtRegR, 9, 5, kFmtRegR, 20, 16, kFmtShift, -1, -1,
188 kFmtRegR, 9, 5, kFmtRegR, 20, 16, kFmtShift, -1, -1,
225 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
470 kFmtRegR, 4, 0, kFmtRegR, 20, 16, kFmtShift, -1, -1,
479 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
607 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
618 kFmtRegR, 9, 5, kFmtRegR, 20, 16, kFmtShift, -1, -1,
777 case kFmtShift: in EncodeLIRs()
[all …]
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| D | arm64_lir.h | 417 kFmtShift, // Register shift, 9-bit at [23..21, 15..10].. enumerator
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| D | utility_arm64.cc | 625 if (kind == kFmtShift) { in OpRegRegShift()
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| /art/compiler/utils/mips/ |
| D | constants_mips.h | 69 kFmtShift = 21, enumerator
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| D | assembler_mips.cc | 75 fmt << kFmtShift | in EmitFR()
86 fmt << kFmtShift | in EmitFI()
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| /art/compiler/dex/quick/arm/ |
| D | assemble_arm.cc | 574 kFmtShift, -1, -1,
579 kFmtShift, -1, -1,
584 kFmtShift, -1, -1,
588 kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,
692 kFmtShift, -1, -1,
697 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
701 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
704 kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,
710 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
725 kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,
[all …]
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| D | arm_lir.h | 567 kFmtShift, // Shift descriptor, [14..12,7..4]. enumerator
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| D | utility_arm.cc | 358 if (EncodingMap[opcode].field_loc[2].kind == kFmtShift) { in OpRegRegShift()
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