Searched refs:ArmOpcode (Results 1 – 8 of 8) sorted by relevance
92 ArmOpcode opcode = UNWIDE(lir->opcode); in GetLoadStoreSize()418 ArmOpcode opcode = LIKELY(low_bits == 0) ? kA64Mov2rr : kA64Mvn2rr; in LoadConstantNoClobber()469 ArmOpcode opcode = LIKELY(value == 0) ? WIDE(kA64Mov2rr) : WIDE(kA64Mvn2rr); in LoadConstantWide()489 ArmOpcode op; in LoadConstantWide()551 ArmOpcode opcode = kA64Brk1d; in OpReg()567 ArmOpcode wide = (r_dest_src1.Is64Bit()) ? WIDE(0) : UNWIDE(0); in OpRegRegShift()569 ArmOpcode opcode = kA64Brk1d; in OpRegRegShift()636 ArmOpcode wide = (r_dest_src1.Is64Bit()) ? WIDE(0) : UNWIDE(0); in OpRegRegExtend()637 ArmOpcode opcode = kA64Brk1d; in OpRegRegExtend()697 ArmOpcode opcode = kA64Brk1d; in OpRegRegRegShift()[all …]
230 enum ArmOpcode { enum374 #define WIDE(op) ((ArmOpcode)((op) | kA64Wide))375 #define UNWIDE(op) ((ArmOpcode)((op) & ~kA64Wide))431 ArmOpcode opcode; // can be WIDE()-ned to indicate it has a wide variant.
265 ArmOpcode opcode = (arm_cond == kArmCondEq) ? kA64Cbz2rt : kA64Cbnz2rt; in OpCmpImmBranch()266 ArmOpcode wide = reg.Is64Bit() ? WIDE(0) : UNWIDE(0); in OpCmpImmBranch()271 ArmOpcode opcode = kA64Cbz2rt; in OpCmpImmBranch()272 ArmOpcode wide = reg.Is64Bit() ? WIDE(0) : UNWIDE(0); in OpCmpImmBranch()304 ArmOpcode opcode = kA64Brk1d; in OpRegCopyNoInsert()628 ArmOpcode wide; in GenDivRem()752 ArmOpcode wide = UNWIDE(0); in GenInlinedCas()946 ArmOpcode opcode = reg.Is64Bit() ? WIDE(kA64Subs3rRd) : UNWIDE(kA64Subs3rRd); in OpDecAndBranch()1689 ArmOpcode wide = (size == k64) ? WIDE(0) : UNWIDE(0); in GenInlinedReverseBits()
422 ArmOpcode wide = (is_double) ? FWIDE(0) : FUNWIDE(0); in GenInlinedRound()440 ArmOpcode wide = (is_double) ? FWIDE(0) : FUNWIDE(0); in GenInlinedMinMaxFP()
655 ArmOpcode opcode = UNWIDE(lir->opcode); in EncodeLIRs()954 ArmOpcode opcode = UNWIDE(lir->opcode); in GetInsnSize()965 ArmOpcode opcode = UNWIDE(lir->opcode); in LinkFixupInsns()
224 ArmOpcode opcode = kThumbBkpt; in OpReg()242 ArmOpcode opcode = kThumbBkpt; in OpRegRegShift()392 ArmOpcode opcode = kThumbBkpt; in OpRegRegRegShift()467 ArmOpcode opcode = kThumbBkpt; in OpRegRegImm()468 ArmOpcode alt_opcode = kThumbBkpt; in OpRegRegImm()604 ArmOpcode opcode = kThumbBkpt; in OpRegImm()696 ArmOpcode opcode = kThumbBkpt; in LoadBaseIndexed()762 ArmOpcode opcode = kThumbBkpt; in StoreBaseIndexed()824 LIR* ArmMir2Lir::LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base, in LoadStoreUsingInsnWithOffsetImm8Shl2()857 ArmOpcode opcode = kThumbBkpt; in LoadBaseDispBody()[all …]
326 enum ArmOpcode { enum585 ArmOpcode opcode;
197 LIR* LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base,