1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef __MSMB_ISP__
20 #define __MSMB_ISP__
21 #include <linux/videodev2.h>
22 #define MAX_PLANES_PER_STREAM 3
23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24 #define MAX_NUM_STREAM 7
25 #define ISP_VERSION_40 40
26 #define ISP_VERSION_32 32
27 #define ISP_NATIVE_BUF_BIT (0x10000 << 0)
28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29 #define ISP0_BIT (0x10000 << 1)
30 #define ISP1_BIT (0x10000 << 2)
31 #define ISP_META_CHANNEL_BIT (0x10000 << 3)
32 #define ISP_SCRATCH_BUF_BIT (0x10000 << 4)
33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34 #define ISP_STATS_STREAM_BIT 0x80000000
35 #define ISP_REG_CFG_NUM_CFG_MAX (10)
36 #define ISP_REG_CFG_CMD_LEN_MAX (3 * 1024)
37 enum ISP_START_PIXEL_PATTERN {
38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39  ISP_BAYER_RGRGRG,
40  ISP_BAYER_GRGRGR,
41  ISP_BAYER_BGBGBG,
42  ISP_BAYER_GBGBGB,
43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44  ISP_YUV_YCbYCr,
45  ISP_YUV_YCrYCb,
46  ISP_YUV_CbYCrY,
47  ISP_YUV_CrYCbY,
48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49  ISP_PIX_PATTERN_MAX
50 };
51 enum msm_vfe_plane_fmt {
52  Y_PLANE,
53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54  CB_PLANE,
55  CR_PLANE,
56  CRCB_PLANE,
57  CBCR_PLANE,
58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59  VFE_PLANE_FMT_MAX
60 };
61 enum msm_vfe_input_src {
62  VFE_PIX_0,
63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64  VFE_RAW_0,
65  VFE_RAW_1,
66  VFE_RAW_2,
67  VFE_SRC_MAX,
68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69 };
70 enum msm_vfe_axi_stream_src {
71  PIX_ENCODER,
72  PIX_VIEWFINDER,
73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74  CAMIF_RAW,
75  IDEAL_RAW,
76  RDI_INTF_0,
77  RDI_INTF_1,
78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79  RDI_INTF_2,
80  VFE_AXI_SRC_MAX
81 };
82 enum msm_vfe_frame_skip_pattern {
83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84  NO_SKIP,
85  EVERY_2FRAME,
86  EVERY_3FRAME,
87  EVERY_4FRAME,
88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89  EVERY_5FRAME,
90  EVERY_6FRAME,
91  EVERY_7FRAME,
92  EVERY_8FRAME,
93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94  EVERY_16FRAME,
95  EVERY_32FRAME,
96  SKIP_ALL,
97  MAX_SKIP,
98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99 };
100 enum msm_vfe_camif_input {
101  CAMIF_DISABLED,
102  CAMIF_PAD_REG_INPUT,
103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104  CAMIF_MIDDI_INPUT,
105  CAMIF_MIPI_INPUT,
106 };
107 struct msm_vfe_camif_cfg {
108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109  uint32_t lines_per_frame;
110  uint32_t pixels_per_line;
111  uint32_t first_pixel;
112  uint32_t last_pixel;
113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114  uint32_t first_line;
115  uint32_t last_line;
116  uint32_t epoch_line0;
117  uint32_t epoch_line1;
118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  enum msm_vfe_camif_input camif_input;
120 };
121 enum msm_vfe_inputmux {
122  CAMIF,
123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124  TESTGEN,
125  EXTERNAL_READ,
126 };
127 struct msm_vfe_pix_cfg {
128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  struct msm_vfe_camif_cfg camif_cfg;
130  enum msm_vfe_inputmux input_mux;
131  enum ISP_START_PIXEL_PATTERN pixel_pattern;
132 };
133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 struct msm_vfe_rdi_cfg {
135  uint8_t cid;
136  uint8_t frame_based;
137 };
138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 struct msm_vfe_input_cfg {
140  union {
141  struct msm_vfe_pix_cfg pix_cfg;
142  struct msm_vfe_rdi_cfg rdi_cfg;
143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144  } d;
145  enum msm_vfe_input_src input_src;
146  uint32_t input_pix_clk;
147 };
148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149 struct msm_vfe_axi_plane_cfg {
150  uint32_t output_width;
151  uint32_t output_height;
152  uint32_t output_stride;
153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154  uint32_t output_scan_lines;
155  uint32_t output_plane_format;
156  uint32_t plane_addr_offset;
157  uint8_t csid_src;
158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159  uint8_t rdi_cid;
160 };
161 struct msm_vfe_axi_stream_request_cmd {
162  uint32_t session_id;
163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164  uint32_t stream_id;
165  uint32_t output_format;
166  enum msm_vfe_axi_stream_src stream_src;
167  struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169  uint32_t burst_count;
170  uint32_t hfr_mode;
171  uint8_t frame_base;
172  uint32_t init_frame_drop;
173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174  enum msm_vfe_frame_skip_pattern frame_skip_pattern;
175  uint8_t buf_divert;
176  uint32_t axi_stream_handle;
177 };
178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179 struct msm_vfe_axi_stream_release_cmd {
180  uint32_t stream_handle;
181 };
182 enum msm_vfe_axi_stream_cmd {
183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184  STOP_STREAM,
185  START_STREAM,
186  STOP_IMMEDIATELY,
187 };
188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 struct msm_vfe_axi_stream_cfg_cmd {
190  uint8_t num_streams;
191  uint32_t stream_handle[MAX_NUM_STREAM];
192  enum msm_vfe_axi_stream_cmd cmd;
193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194 };
195 enum msm_vfe_axi_stream_update_type {
196  ENABLE_STREAM_BUF_DIVERT,
197  DISABLE_STREAM_BUF_DIVERT,
198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199  UPDATE_STREAM_FRAMEDROP_PATTERN,
200  UPDATE_STREAM_REQUEST_FRAMES,
201 };
202 struct msm_vfe_axi_stream_update_cmd {
203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204  uint32_t stream_handle;
205  enum msm_vfe_axi_stream_update_type update_type;
206  enum msm_vfe_frame_skip_pattern skip_pattern;
207  uint32_t request_frm_num;
208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209 };
210 enum msm_isp_stats_type {
211  MSM_ISP_STATS_AEC,
212  MSM_ISP_STATS_AF,
213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214  MSM_ISP_STATS_AWB,
215  MSM_ISP_STATS_RS,
216  MSM_ISP_STATS_CS,
217  MSM_ISP_STATS_IHIST,
218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219  MSM_ISP_STATS_SKIN,
220  MSM_ISP_STATS_BG,
221  MSM_ISP_STATS_BF,
222  MSM_ISP_STATS_BE,
223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224  MSM_ISP_STATS_BHIST,
225  MSM_ISP_STATS_MAX
226 };
227 struct msm_vfe_stats_stream_request_cmd {
228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229  uint32_t session_id;
230  uint32_t stream_id;
231  enum msm_isp_stats_type stats_type;
232  uint32_t composite_flag;
233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234  uint32_t framedrop_pattern;
235  uint32_t irq_subsample_pattern;
236  uint32_t buffer_offset;
237  uint32_t stream_handle;
238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239 };
240 struct msm_vfe_stats_stream_release_cmd {
241  uint32_t stream_handle;
242 };
243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244 struct msm_vfe_stats_stream_cfg_cmd {
245  uint8_t num_streams;
246  uint32_t stream_handle[MSM_ISP_STATS_MAX];
247  uint8_t enable;
248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249 };
250 enum msm_vfe_reg_cfg_type {
251  VFE_WRITE,
252  VFE_WRITE_MB,
253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254  VFE_READ,
255  VFE_CFG_MASK,
256  VFE_WRITE_DMI_16BIT,
257  VFE_WRITE_DMI_32BIT,
258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259  VFE_WRITE_DMI_64BIT,
260  VFE_READ_DMI_16BIT,
261  VFE_READ_DMI_32BIT,
262  VFE_READ_DMI_64BIT,
263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 };
265 struct msm_vfe_cfg_cmd2 {
266  uint16_t num_cfg;
267  uint16_t cmd_len;
268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269  void __user *cfg_data;
270  void __user *cfg_cmd;
271 };
272 struct msm_vfe_reg_rw_info {
273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274  uint32_t reg_offset;
275  uint32_t cmd_data_offset;
276  uint32_t len;
277 };
278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279 struct msm_vfe_reg_mask_info {
280  uint32_t reg_offset;
281  uint32_t mask;
282  uint32_t val;
283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284 };
285 struct msm_vfe_reg_dmi_info {
286  uint32_t hi_tbl_offset;
287  uint32_t lo_tbl_offset;
288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289  uint32_t len;
290 };
291 struct msm_vfe_reg_cfg_cmd {
292  union {
293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294  struct msm_vfe_reg_rw_info rw_info;
295  struct msm_vfe_reg_mask_info mask_info;
296  struct msm_vfe_reg_dmi_info dmi_info;
297  } u;
298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299  enum msm_vfe_reg_cfg_type cmd_type;
300 };
301 enum msm_isp_buf_type {
302  ISP_PRIVATE_BUF,
303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304  ISP_SHARE_BUF,
305  MAX_ISP_BUF_TYPE,
306 };
307 struct msm_isp_buf_request {
308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309  uint32_t session_id;
310  uint32_t stream_id;
311  uint8_t num_buf;
312  uint32_t handle;
313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314  enum msm_isp_buf_type buf_type;
315 };
316 struct msm_isp_qbuf_info {
317  uint32_t handle;
318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319  int buf_idx;
320  struct v4l2_buffer buffer;
321  uint32_t dirty_buf;
322 };
323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324 struct msm_vfe_axi_src_state {
325  enum msm_vfe_input_src input_src;
326  uint32_t src_active;
327 };
328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329 enum msm_isp_event_idx {
330  ISP_REG_UPDATE = 0,
331  ISP_START_ACK = 1,
332  ISP_STOP_ACK = 2,
333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334  ISP_IRQ_VIOLATION = 3,
335  ISP_WM_BUS_OVERFLOW = 4,
336  ISP_STATS_OVERFLOW = 5,
337  ISP_CAMIF_ERROR = 6,
338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339  ISP_SOF = 7,
340  ISP_EOF = 8,
341  ISP_FRAME_DROP = 9,
342  ISP_EVENT_MAX = 10
343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344 };
345 #define ISP_EVENT_OFFSET 8
346 #define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
347 #define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349 #define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
350 #define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
351 #define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
352 #define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354 #define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION)
355 #define ISP_EVENT_WM_BUS_OVERFLOW (ISP_EVENT_BASE + ISP_WM_BUS_OVERFLOW)
356 #define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
357 #define ISP_EVENT_CAMIF_ERROR (ISP_EVENT_BASE + ISP_CAMIF_ERROR)
358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359 #define ISP_EVENT_SOF (ISP_EVENT_BASE + ISP_SOF)
360 #define ISP_EVENT_EOF (ISP_EVENT_BASE + ISP_EOF)
361 #define ISP_EVENT_FRAME_DROP (ISP_EVENT_BASE + ISP_FRAME_DROP)
362 #define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364 #define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
365 #define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX)
366 struct msm_isp_buf_event {
367  uint32_t session_id;
368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369  uint32_t stream_id;
370  uint32_t handle;
371  int8_t buf_idx;
372 };
373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374 struct msm_isp_stats_event {
375  uint32_t stats_mask;
376  uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX];
377 };
378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379 struct msm_isp_stream_ack {
380  uint32_t session_id;
381  uint32_t stream_id;
382  uint32_t handle;
383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384 };
385 struct msm_isp_event_data {
386  struct timeval timestamp;
387  struct timeval mono_timestamp;
388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389  uint32_t frame_id;
390  union {
391  struct msm_isp_stream_ack stream_ack;
392  enum msm_vfe_input_src input_src;
393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394  struct msm_isp_stats_event stats;
395  uint32_t irq_status_mask;
396  struct msm_isp_buf_event buf_done;
397  } u;
398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399 };
400 #define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
401 #define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
402 #define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404 #define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
405 #define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
406 #define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
407 #define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409 #define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
410 #define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
411 #define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
412 #define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414 #define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
415 #define VIDIOC_MSM_VFE_REG_CFG   _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
416 #define VIDIOC_MSM_ISP_REQUEST_BUF   _IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request)
417 #define VIDIOC_MSM_ISP_ENQUEUE_BUF   _IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info)
418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419 #define VIDIOC_MSM_ISP_RELEASE_BUF   _IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request)
420 #define VIDIOC_MSM_ISP_REQUEST_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd)
421 #define VIDIOC_MSM_ISP_CFG_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd)
422 #define VIDIOC_MSM_ISP_RELEASE_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd)
423 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424 #define VIDIOC_MSM_ISP_INPUT_CFG   _IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg)
425 #define VIDIOC_MSM_ISP_SET_SRC_STATE   _IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state)
426 #define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+9,   struct msm_vfe_stats_stream_request_cmd)
427 #define VIDIOC_MSM_ISP_CFG_STATS_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd)
428 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429 #define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+11,   struct msm_vfe_stats_stream_release_cmd)
430 #define VIDIOC_MSM_ISP_UPDATE_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd)
431 #define VIDIOC_MSM_ISP_CONFIG_DONE   _IOWR('V', BASE_VIDIOC_PRIVATE+14, int)
432 #endif
433 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
434