1page.title=Dalvik bytecode
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19<div id="qv-wrapper">
20  <div id="qv">
21    <h2>In this document</h2>
22    <ol id="auto-toc">
23    </ol>
24  </div>
25</div>
26
27<h2 id="design">General design</h2>
28
29<ul>
30<li>The machine model and calling conventions are meant to approximately
31  imitate common real architectures and C-style calling conventions:
32  <ul>
33  <li>The machine is register-based, and frames are fixed in size upon creation.
34    Each frame consists of a particular number of registers (specified by
35    the method) as well as any adjunct data needed to execute the method,
36    such as (but not limited to) the program counter and a reference to the
37    <code>.dex</code> file that contains the method.
38  </li>
39  <li>When used for bit values (such as integers and floating point
40    numbers), registers are considered 32 bits wide. Adjacent register
41    pairs are used for 64-bit values. There is no alignment requirement
42    for register pairs.
43  </li>
44  <li>When used for object references, registers are considered wide enough
45    to hold exactly one such reference.
46  </li>
47  <li>In terms of bitwise representation, <code>(Object) null == (int)
48    0</code>.
49  </li>
50  <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers
51    of the method's invocation frame, in order. Wide arguments consume
52    two registers. Instance methods are passed a <code>this</code> reference
53    as their first argument.
54  </li>
55  </ul>
56<li>The storage unit in the instruction stream is a 16-bit unsigned quantity.
57  Some bits in some instructions are ignored / must-be-zero.
58</li>
59<li>Instructions aren't gratuitously limited to a particular type. For
60  example, instructions that move 32-bit register values without interpretation
61  don't have to specify whether they are moving ints or floats.
62</li>
63<li>There are separately enumerated and indexed constant pools for
64  references to strings, types, fields, and methods.
65</li>
66<li>Bitwise literal data is represented in-line in the instruction stream.</li>
67<li>Because, in practice, it is uncommon for a method to need more than
68  16 registers, and because needing more than eight registers <i>is</i>
69  reasonably common, many instructions are limited to only addressing
70  the first 16
71  registers. When reasonably possible, instructions allow references to
72  up to the first 256 registers. In addition, some instructions have variants
73  that allow for much larger register counts, including a pair of catch-all
74  <code>move</code> instructions that can address registers in the range
75  <code>v0</code> &ndash; <code>v65535</code>.
76  In cases where an instruction variant isn't
77  available to address a desired register, it is expected that the register
78  contents get moved from the original register to a low register (before the
79  operation) and/or moved from a low result register to a high register
80  (after the operation).
81</li>
82<li>There are several "pseudo-instructions" that are used to hold
83  variable-length data payloads, which are referred to by regular
84  instructions (for example,
85  <code>fill-array-data</code>). Such instructions must never be
86  encountered during the normal flow of execution. In addition, the
87  instructions must be located on even-numbered bytecode offsets (that is,
88  4-byte aligned). In order to meet this requirement, dex generation tools
89  must emit an extra <code>nop</code> instruction as a spacer if such an
90  instruction would otherwise be unaligned. Finally, though not required,
91  it is expected that most tools will choose to emit these instructions at
92  the ends of methods, since otherwise it would likely be the case that
93  additional instructions would be needed to branch around them.
94</li>
95<li>When installed on a running system, some instructions may be altered,
96  changing their format, as an install-time static linking optimization.
97  This is to allow for faster execution once linkage is known.
98  See the associated
99  <a href="instruction-formats.html">instruction formats document</a>
100  for the suggested variants. The word "suggested" is used advisedly;
101  it is not mandatory to implement these.
102</li>
103<li>Human-syntax and mnemonics:
104  <ul>
105  <li>Dest-then-source ordering for arguments.</li>
106  <li>Some opcodes have a disambiguating name suffix to indicate the type(s)
107    they operate on:
108    <ul>
109    <li>Type-general 32-bit opcodes are unmarked.</li>
110    <li>Type-general 64-bit opcodes are suffixed with <code>-wide</code>.</li>
111    <li>Type-specific opcodes are suffixed with their type (or a
112    straightforward abbreviation), one of: <code>-boolean</code>
113    <code>-byte</code> <code>-char</code> <code>-short</code>
114    <code>-int</code> <code>-long</code> <code>-float</code>
115    <code>-double</code> <code>-object</code> <code>-string</code>
116    <code>-class</code> <code>-void</code>.</li>
117    </ul>
118  </li>
119  <li>Some opcodes have a disambiguating suffix to distinguish
120    otherwise-identical operations that have different instruction layouts
121    or options. These suffixes are separated from the main names with a slash
122    ("<code>/</code>") and mainly exist at all to make there be a one-to-one
123    mapping with static constants in the code that generates and interprets
124    executables (that is, to reduce ambiguity for humans).
125  </li>
126  <li>In the descriptions here, the width of a value (indicating, e.g., the
127    range of a constant or the number of registers possibly addressed) is
128    emphasized by the use of a character per four bits of width.
129  </li>
130  <li>For example, in the instruction
131    "<code>move-wide/from16 vAA, vBBBB</code>":
132    <ul>
133    <li>"<code>move</code>" is the base opcode, indicating the base operation
134    (move a register's value).</li>
135    <li>"<code>wide</code>" is the name suffix, indicating that it operates
136    on wide (64 bit) data.</li>
137    <li>"<code>from16</code>" is the opcode suffix, indicating a variant
138    that has a 16-bit register reference as a source.</li>
139    <li>"<code>vAA</code>" is the destination register (implied by the
140    operation; again, the rule is that destination arguments always come
141    first), which must be in the range <code>v0</code> &ndash;
142    <code>v255</code>.</li>
143    <li>"<code>vBBBB</code>" is the source register, which must be in the
144    range <code>v0</code> &ndash; <code>v65535</code>.</li>
145    </ul>
146  </li>
147  </ul>
148</li>
149<li>See the <a href="instruction-formats.html">instruction formats
150  document</a> for more details about the various instruction formats
151  (listed under "Op &amp; Format") as well as details about the opcode
152  syntax.
153</li>
154<li>See the <a href="dex-format.html"><code>.dex</code> file format
155  document</a> for more details about where the bytecode fits into
156  the bigger picture.
157</li>
158</ul>
159
160<h2 id="instructions">Summary of bytecode set</h2>
161
162<table class="instruc">
163<thead>
164<tr>
165  <th>Op &amp; Format</th>
166  <th>Mnemonic / Syntax</th>
167  <th>Arguments</th>
168  <th>Description</th>
169</tr>
170</thead>
171<tbody>
172<tr>
173  <td>00 10x</td>
174  <td>nop</td>
175  <td>&nbsp;</td>
176  <td>Waste cycles.
177    <p><b>Note:</b>
178    Data-bearing pseudo-instructions are tagged with this opcode, in which
179    case the high-order byte of the opcode unit indicates the nature of
180    the data. See "<code>packed-switch-payload</code> Format",
181    "<code>sparse-switch-payload</code> Format", and
182    "<code>fill-array-data-payload</code> Format" below.</p>
183  </td>
184</tr>
185<tr>
186  <td>01 12x</td>
187  <td>move vA, vB</td>
188  <td><code>A:</code> destination register (4 bits)<br/>
189    <code>B:</code> source register (4 bits)</td>
190  <td>Move the contents of one non-object register to another.</td>
191</tr>
192<tr>
193  <td>02 22x</td>
194  <td>move/from16 vAA, vBBBB</td>
195  <td><code>A:</code> destination register (8 bits)<br/>
196    <code>B:</code> source register (16 bits)</td>
197  <td>Move the contents of one non-object register to another.</td>
198</tr>
199<tr>
200  <td>03 32x</td>
201  <td>move/16 vAAAA, vBBBB</td>
202  <td><code>A:</code> destination register (16 bits)<br/>
203    <code>B:</code> source register (16 bits)</td>
204  <td>Move the contents of one non-object register to another.</td>
205</tr>
206<tr>
207  <td>04 12x</td>
208  <td>move-wide vA, vB</td>
209  <td><code>A:</code> destination register pair (4 bits)<br/>
210    <code>B:</code> source register pair (4 bits)</td>
211  <td>Move the contents of one register-pair to another.
212    <p><b>Note:</b>
213    It is legal to move from <code>v<i>N</i></code> to either
214    <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations
215    must arrange for both halves of a register pair to be read before
216    anything is written.</p>
217  </td>
218</tr>
219<tr>
220  <td>05 22x</td>
221  <td>move-wide/from16 vAA, vBBBB</td>
222  <td><code>A:</code> destination register pair (8 bits)<br/>
223    <code>B:</code> source register pair (16 bits)</td>
224  <td>Move the contents of one register-pair to another.
225    <p><b>Note:</b>
226    Implementation considerations are the same as <code>move-wide</code>,
227    above.</p>
228  </td>
229</tr>
230<tr>
231  <td>06 32x</td>
232  <td>move-wide/16 vAAAA, vBBBB</td>
233  <td><code>A:</code> destination register pair (16 bits)<br/>
234    <code>B:</code> source register pair (16 bits)</td>
235  <td>Move the contents of one register-pair to another.
236    <p><b>Note:</b>
237    Implementation considerations are the same as <code>move-wide</code>,
238    above.</p>
239  </td>
240</tr>
241<tr>
242  <td>07 12x</td>
243  <td>move-object vA, vB</td>
244  <td><code>A:</code> destination register (4 bits)<br/>
245    <code>B:</code> source register (4 bits)</td>
246  <td>Move the contents of one object-bearing register to another.</td>
247</tr>
248<tr>
249  <td>08 22x</td>
250  <td>move-object/from16 vAA, vBBBB</td>
251  <td><code>A:</code> destination register (8 bits)<br/>
252    <code>B:</code> source register (16 bits)</td>
253  <td>Move the contents of one object-bearing register to another.</td>
254</tr>
255<tr>
256  <td>09 32x</td>
257  <td>move-object/16 vAAAA, vBBBB</td>
258  <td><code>A:</code> destination register (16 bits)<br/>
259    <code>B:</code> source register (16 bits)</td>
260  <td>Move the contents of one object-bearing register to another.</td>
261</tr>
262<tr>
263  <td>0a 11x</td>
264  <td>move-result vAA</td>
265  <td><code>A:</code> destination register (8 bits)</td>
266  <td>Move the single-word non-object result of the most recent
267    <code>invoke-<i>kind</i></code> into the indicated register.
268    This must be done as the instruction immediately after an
269    <code>invoke-<i>kind</i></code> whose (single-word, non-object) result
270    is not to be ignored; anywhere else is invalid.</td>
271</tr>
272<tr>
273  <td>0b 11x</td>
274  <td>move-result-wide vAA</td>
275  <td><code>A:</code> destination register pair (8 bits)</td>
276  <td>Move the double-word result of the most recent
277    <code>invoke-<i>kind</i></code> into the indicated register pair.
278    This must be done as the instruction immediately after an
279    <code>invoke-<i>kind</i></code> whose (double-word) result
280    is not to be ignored; anywhere else is invalid.</td>
281</tr>
282<tr>
283  <td>0c 11x</td>
284  <td>move-result-object vAA</td>
285  <td><code>A:</code> destination register (8 bits)</td>
286  <td>Move the object result of the most recent <code>invoke-<i>kind</i></code>
287    into the indicated register. This must be done as the instruction
288    immediately after an <code>invoke-<i>kind</i></code> or
289    <code>filled-new-array</code>
290    whose (object) result is not to be ignored; anywhere else is invalid.</td>
291</tr>
292<tr>
293  <td>0d 11x</td>
294  <td>move-exception vAA</td>
295  <td><code>A:</code> destination register (8 bits)</td>
296  <td>Save a just-caught exception into the given register. This must
297    be the first instruction of any exception handler whose caught
298    exception is not to be ignored, and this instruction must <i>only</i>
299    ever occur as the first instruction of an exception handler; anywhere
300    else is invalid.</td>
301</tr>
302<tr>
303  <td>0e 10x</td>
304  <td>return-void</td>
305  <td>&nbsp;</td>
306  <td>Return from a <code>void</code> method.</td>
307</tr>
308<tr>
309  <td>0f 11x</td>
310  <td>return vAA</td>
311  <td><code>A:</code> return value register (8 bits)</td>
312  <td>Return from a single-width (32-bit) non-object value-returning
313    method.
314  </td>
315</tr>
316<tr>
317  <td>10 11x</td>
318  <td>return-wide vAA</td>
319  <td><code>A:</code> return value register-pair (8 bits)</td>
320  <td>Return from a double-width (64-bit) value-returning method.</td>
321</tr>
322<tr>
323  <td>11 11x</td>
324  <td>return-object vAA</td>
325  <td><code>A:</code> return value register (8 bits)</td>
326  <td>Return from an object-returning method.</td>
327</tr>
328<tr>
329  <td>12 11n</td>
330  <td>const/4 vA, #+B</td>
331  <td><code>A:</code> destination register (4 bits)<br/>
332    <code>B:</code> signed int (4 bits)</td>
333  <td>Move the given literal value (sign-extended to 32 bits) into
334    the specified register.</td>
335</tr>
336<tr>
337  <td>13 21s</td>
338  <td>const/16 vAA, #+BBBB</td>
339  <td><code>A:</code> destination register (8 bits)<br/>
340    <code>B:</code> signed int (16 bits)</td>
341  <td>Move the given literal value (sign-extended to 32 bits) into
342    the specified register.</td>
343</tr>
344<tr>
345  <td>14 31i</td>
346  <td>const vAA, #+BBBBBBBB</td>
347  <td><code>A:</code> destination register (8 bits)<br/>
348    <code>B:</code> arbitrary 32-bit constant</td>
349  <td>Move the given literal value into the specified register.</td>
350</tr>
351<tr>
352  <td>15 21h</td>
353  <td>const/high16 vAA, #+BBBB0000</td>
354  <td><code>A:</code> destination register (8 bits)<br/>
355    <code>B:</code> signed int (16 bits)</td>
356  <td>Move the given literal value (right-zero-extended to 32 bits) into
357    the specified register.</td>
358</tr>
359<tr>
360  <td>16 21s</td>
361  <td>const-wide/16 vAA, #+BBBB</td>
362  <td><code>A:</code> destination register (8 bits)<br/>
363    <code>B:</code> signed int (16 bits)</td>
364  <td>Move the given literal value (sign-extended to 64 bits) into
365    the specified register-pair.</td>
366</tr>
367<tr>
368  <td>17 31i</td>
369  <td>const-wide/32 vAA, #+BBBBBBBB</td>
370  <td><code>A:</code> destination register (8 bits)<br/>
371    <code>B:</code> signed int (32 bits)</td>
372  <td>Move the given literal value (sign-extended to 64 bits) into
373    the specified register-pair.</td>
374</tr>
375<tr>
376  <td>18 51l</td>
377  <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td>
378  <td><code>A:</code> destination register (8 bits)<br/>
379    <code>B:</code> arbitrary double-width (64-bit) constant</td>
380  <td>Move the given literal value into
381    the specified register-pair.</td>
382</tr>
383<tr>
384  <td>19 21h</td>
385  <td>const-wide/high16 vAA, #+BBBB000000000000</td>
386  <td><code>A:</code> destination register (8 bits)<br/>
387    <code>B:</code> signed int (16 bits)</td>
388  <td>Move the given literal value (right-zero-extended to 64 bits) into
389    the specified register-pair.</td>
390</tr>
391<tr>
392  <td>1a 21c</td>
393  <td>const-string vAA, string@BBBB</td>
394  <td><code>A:</code> destination register (8 bits)<br/>
395    <code>B:</code> string index</td>
396  <td>Move a reference to the string specified by the given index into the
397    specified register.</td>
398</tr>
399<tr>
400  <td>1b 31c</td>
401  <td>const-string/jumbo vAA, string@BBBBBBBB</td>
402  <td><code>A:</code> destination register (8 bits)<br/>
403    <code>B:</code> string index</td>
404  <td>Move a reference to the string specified by the given index into the
405    specified register.</td>
406</tr>
407<tr>
408  <td>1c 21c</td>
409  <td>const-class vAA, type@BBBB</td>
410  <td><code>A:</code> destination register (8 bits)<br/>
411    <code>B:</code> type index</td>
412  <td>Move a reference to the class specified by the given index into the
413    specified register. In the case where the indicated type is primitive,
414    this will store a reference to the primitive type's degenerate
415    class.</td>
416</tr>
417<tr>
418  <td>1d 11x</td>
419  <td>monitor-enter vAA</td>
420  <td><code>A:</code> reference-bearing register (8 bits)</td>
421  <td>Acquire the monitor for the indicated object.</td>
422</tr>
423<tr>
424  <td>1e 11x</td>
425  <td>monitor-exit vAA</td>
426  <td><code>A:</code> reference-bearing register (8 bits)</td>
427  <td>Release the monitor for the indicated object.
428    <p><b>Note:</b>
429    If this instruction needs to throw an exception, it must do
430    so as if the pc has already advanced past the instruction.
431    It may be useful to think of this as the instruction successfully
432    executing (in a sense), and the exception getting thrown <i>after</i>
433    the instruction but <i>before</i> the next one gets a chance to
434    run. This definition makes it possible for a method to use
435    a monitor cleanup catch-all (e.g., <code>finally</code>) block as
436    the monitor cleanup for that block itself, as a way to handle the
437    arbitrary exceptions that might get thrown due to the historical
438    implementation of <code>Thread.stop()</code>, while still managing
439    to have proper monitor hygiene.</p>
440  </td>
441</tr>
442<tr>
443  <td>1f 21c</td>
444  <td>check-cast vAA, type@BBBB</td>
445  <td><code>A:</code> reference-bearing register (8 bits)<br/>
446    <code>B:</code> type index (16 bits)</td>
447  <td>Throw a <code>ClassCastException</code> if the reference in the
448    given register cannot be cast to the indicated type.
449    <p><b>Note:</b> Since <code>A</code> must always be a reference
450    (and not a primitive value), this will necessarily fail at runtime
451    (that is, it will throw an exception) if <code>B</code> refers to a
452    primitive type.</p>
453  </td>
454</tr>
455<tr>
456  <td>20 22c</td>
457  <td>instance-of vA, vB, type@CCCC</td>
458  <td><code>A:</code> destination register (4 bits)<br/>
459    <code>B:</code> reference-bearing register (4 bits)<br/>
460    <code>C:</code> type index (16 bits)</td>
461  <td>Store in the given destination register <code>1</code>
462    if the indicated reference is an instance of the given type,
463    or <code>0</code> if not.
464    <p><b>Note:</b> Since <code>B</code> must always be a reference
465    (and not a primitive value), this will always result
466    in <code>0</code> being stored if <code>C</code> refers to a primitive
467    type.</td>
468</tr>
469<tr>
470  <td>21 12x</td>
471  <td>array-length vA, vB</td>
472  <td><code>A:</code> destination register (4 bits)<br/>
473    <code>B:</code> array reference-bearing register (4 bits)</td>
474  <td>Store in the given destination register the length of the indicated
475    array, in entries</td>
476</tr>
477<tr>
478  <td>22 21c</td>
479  <td>new-instance vAA, type@BBBB</td>
480  <td><code>A:</code> destination register (8 bits)<br/>
481    <code>B:</code> type index</td>
482  <td>Construct a new instance of the indicated type, storing a
483    reference to it in the destination. The type must refer to a
484    non-array class.</td>
485</tr>
486<tr>
487  <td>23 22c</td>
488  <td>new-array vA, vB, type@CCCC</td>
489  <td><code>A:</code> destination register (8 bits)<br/>
490    <code>B:</code> size register<br/>
491    <code>C:</code> type index</td>
492  <td>Construct a new array of the indicated type and size. The type
493    must be an array type.</td>
494</tr>
495<tr>
496  <td>24 35c</td>
497  <td>filled-new-array {vC, vD, vE, vF, vG}, type@BBBB</td>
498  <td>
499    <code>A:</code> array size and argument word count (4 bits)<br/>
500    <code>B:</code> type index (16 bits)<br/>
501    <code>C..G:</code> argument registers (4 bits each)
502  </td>
503  <td>Construct an array of the given type and size, filling it with the
504    supplied contents. The type must be an array type. The array's
505    contents must be single-word (that is,
506    no arrays of <code>long</code> or <code>double</code>, but reference
507    types are acceptable). The constructed
508    instance is stored as a "result" in the same way that the method invocation
509    instructions store their results, so the constructed instance must
510    be moved to a register with an immediately subsequent
511    <code>move-result-object</code> instruction (if it is to be used).</td>
512</tr>
513<tr>
514  <td>25 3rc</td>
515  <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td>
516  <td><code>A:</code> array size and argument word count (8 bits)<br/>
517    <code>B:</code> type index (16 bits)<br/>
518    <code>C:</code> first argument register (16 bits)<br/>
519    <code>N = A + C - 1</code></td>
520  <td>Construct an array of the given type and size, filling it with
521    the supplied contents. Clarifications and restrictions are the same
522    as <code>filled-new-array</code>, described above.</td>
523</tr>
524<tr>
525  <td>26 31t</td>
526  <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified
527    below in "<code>fill-array-data-payload</code> Format")</i></td>
528  <td><code>A:</code> array reference (8 bits)<br/>
529    <code>B:</code> signed "branch" offset to table data pseudo-instruction
530    (32 bits)
531  </td>
532  <td>Fill the given array with the indicated data. The reference must be
533    to an array of primitives, and the data table must match it in type and
534    must contain no more elements than will fit in the array. That is,
535    the array may be larger than the table, and if so, only the initial
536    elements of the array are set, leaving the remainder alone.
537  </td>
538</tr>
539<tr>
540  <td>27 11x</td>
541  <td>throw vAA</td>
542  <td><code>A:</code> exception-bearing register (8 bits)<br/></td>
543  <td>Throw the indicated exception.</td>
544</tr>
545<tr>
546  <td>28 10t</td>
547  <td>goto +AA</td>
548  <td><code>A:</code> signed branch offset (8 bits)</td>
549  <td>Unconditionally jump to the indicated instruction.
550    <p><b>Note:</b>
551    The branch offset must not be <code>0</code>. (A spin
552    loop may be legally constructed either with <code>goto/32</code> or
553    by including a <code>nop</code> as a target before the branch.)</p>
554  </td>
555</tr>
556<tr>
557  <td>29 20t</td>
558  <td>goto/16 +AAAA</td>
559  <td><code>A:</code> signed branch offset (16 bits)<br/></td>
560  <td>Unconditionally jump to the indicated instruction.
561    <p><b>Note:</b>
562    The branch offset must not be <code>0</code>. (A spin
563    loop may be legally constructed either with <code>goto/32</code> or
564    by including a <code>nop</code> as a target before the branch.)</p>
565  </td>
566</tr>
567<tr>
568  <td>2a 30t</td>
569  <td>goto/32 +AAAAAAAA</td>
570  <td><code>A:</code> signed branch offset (32 bits)<br/></td>
571  <td>Unconditionally jump to the indicated instruction.</td>
572</tr>
573<tr>
574  <td>2b 31t</td>
575  <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as
576    specified below in "<code>packed-switch-payload</code> Format")</i></td>
577  <td><code>A:</code> register to test<br/>
578    <code>B:</code> signed "branch" offset to table data pseudo-instruction
579    (32 bits)
580  </td>
581  <td>Jump to a new instruction based on the value in the
582    given register, using a table of offsets corresponding to each value
583    in a particular integral range, or fall through to the next
584    instruction if there is no match.
585  </td>
586</tr>
587<tr>
588  <td>2c 31t</td>
589  <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as
590    specified below in "<code>sparse-switch-payload</code> Format")</i></td>
591  <td><code>A:</code> register to test<br/>
592    <code>B:</code> signed "branch" offset to table data pseudo-instruction
593    (32 bits)
594  </td>
595  <td>Jump to a new instruction based on the value in the given
596    register, using an ordered table of value-offset pairs, or fall
597    through to the next instruction if there is no match.
598  </td>
599</tr>
600<tr>
601  <td>2d..31 23x</td>
602  <td>cmp<i>kind</i> vAA, vBB, vCC<br/>
603    2d: cmpl-float <i>(lt bias)</i><br/>
604    2e: cmpg-float <i>(gt bias)</i><br/>
605    2f: cmpl-double <i>(lt bias)</i><br/>
606    30: cmpg-double <i>(gt bias)</i><br/>
607    31: cmp-long
608  </td>
609  <td><code>A:</code> destination register (8 bits)<br/>
610    <code>B:</code> first source register or pair<br/>
611    <code>C:</code> second source register or pair</td>
612  <td>Perform the indicated floating point or <code>long</code> comparison,
613    setting <code>a</code> to <code>0</code> if <code>b == c</code>,
614    <code>1</code> if <code>b &gt; c</code>,
615    or <code>-1</code> if <code>b &lt; c</code>.
616    The "bias" listed for the floating point operations
617    indicates how <code>NaN</code> comparisons are treated: "gt bias"
618    instructions return <code>1</code> for <code>NaN</code> comparisons,
619    and "lt bias" instructions return <code>-1</code>.
620    <p>For example, to check to see if floating point
621    <code>x &lt; y</code> it is advisable to use
622    <code>cmpg-float</code>; a result of <code>-1</code> indicates that
623    the test was true, and the other values indicate it was false either
624    due to a valid comparison or because one of the values was
625    <code>NaN</code>.</p>
626  </td>
627</tr>
628<tr>
629  <td>32..37 22t</td>
630  <td>if-<i>test</i> vA, vB, +CCCC<br/>
631    32: if-eq<br/>
632    33: if-ne<br/>
633    34: if-lt<br/>
634    35: if-ge<br/>
635    36: if-gt<br/>
636    37: if-le<br/>
637  </td>
638  <td><code>A:</code> first register to test (4 bits)<br/>
639    <code>B:</code> second register to test (4 bits)<br/>
640    <code>C:</code> signed branch offset (16 bits)</td>
641  <td>Branch to the given destination if the given two registers' values
642    compare as specified.
643    <p><b>Note:</b>
644    The branch offset must not be <code>0</code>. (A spin
645    loop may be legally constructed either by branching around a
646    backward <code>goto</code> or by including a <code>nop</code> as
647    a target before the branch.)</p>
648  </td>
649</tr>
650<tr>
651  <td>38..3d 21t</td>
652  <td>if-<i>test</i>z vAA, +BBBB<br/>
653    38: if-eqz<br/>
654    39: if-nez<br/>
655    3a: if-ltz<br/>
656    3b: if-gez<br/>
657    3c: if-gtz<br/>
658    3d: if-lez<br/>
659  </td>
660  <td><code>A:</code> register to test (8 bits)<br/>
661    <code>B:</code> signed branch offset (16 bits)</td>
662  <td>Branch to the given destination if the given register's value compares
663    with 0 as specified.
664    <p><b>Note:</b>
665    The branch offset must not be <code>0</code>. (A spin
666    loop may be legally constructed either by branching around a
667    backward <code>goto</code> or by including a <code>nop</code> as
668    a target before the branch.)</p>
669  </td>
670</tr>
671<tr>
672  <td>3e..43 10x</td>
673  <td><i>(unused)</i></td>
674  <td>&nbsp;</td>
675  <td><i>(unused)</i></td>
676</tr>
677<tr>
678  <td>44..51 23x</td>
679  <td><i>arrayop</i> vAA, vBB, vCC<br/>
680    44: aget<br/>
681    45: aget-wide<br/>
682    46: aget-object<br/>
683    47: aget-boolean<br/>
684    48: aget-byte<br/>
685    49: aget-char<br/>
686    4a: aget-short<br/>
687    4b: aput<br/>
688    4c: aput-wide<br/>
689    4d: aput-object<br/>
690    4e: aput-boolean<br/>
691    4f: aput-byte<br/>
692    50: aput-char<br/>
693    51: aput-short
694  </td>
695  <td><code>A:</code> value register or pair; may be source or dest
696      (8 bits)<br/>
697    <code>B:</code> array register (8 bits)<br/>
698    <code>C:</code> index register (8 bits)</td>
699  <td>Perform the identified array operation at the identified index of
700    the given array, loading or storing into the value register.</td>
701</tr>
702<tr>
703  <td>52..5f 22c</td>
704  <td>i<i>instanceop</i> vA, vB, field@CCCC<br/>
705    52: iget<br/>
706    53: iget-wide<br/>
707    54: iget-object<br/>
708    55: iget-boolean<br/>
709    56: iget-byte<br/>
710    57: iget-char<br/>
711    58: iget-short<br/>
712    59: iput<br/>
713    5a: iput-wide<br/>
714    5b: iput-object<br/>
715    5c: iput-boolean<br/>
716    5d: iput-byte<br/>
717    5e: iput-char<br/>
718    5f: iput-short
719  </td>
720  <td><code>A:</code> value register or pair; may be source or dest
721      (4 bits)<br/>
722    <code>B:</code> object register (4 bits)<br/>
723    <code>C:</code> instance field reference index (16 bits)</td>
724  <td>Perform the identified object instance field operation with
725    the identified field, loading or storing into the value register.
726    <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
727    altering the field argument to be a more direct offset.</p>
728  </td>
729</tr>
730<tr>
731  <td>60..6d 21c</td>
732  <td>s<i>staticop</i> vAA, field@BBBB<br/>
733    60: sget<br/>
734    61: sget-wide<br/>
735    62: sget-object<br/>
736    63: sget-boolean<br/>
737    64: sget-byte<br/>
738    65: sget-char<br/>
739    66: sget-short<br/>
740    67: sput<br/>
741    68: sput-wide<br/>
742    69: sput-object<br/>
743    6a: sput-boolean<br/>
744    6b: sput-byte<br/>
745    6c: sput-char<br/>
746    6d: sput-short
747  </td>
748  <td><code>A:</code> value register or pair; may be source or dest
749      (8 bits)<br/>
750    <code>B:</code> static field reference index (16 bits)</td>
751  <td>Perform the identified object static field operation with the identified
752    static field, loading or storing into the value register.
753    <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
754    altering the field argument to be a more direct offset.</p>
755  </td>
756</tr>
757<tr>
758  <td>6e..72 35c</td>
759  <td>invoke-<i>kind</i> {vC, vD, vE, vF, vG}, meth@BBBB<br/>
760    6e: invoke-virtual<br/>
761    6f: invoke-super<br/>
762    70: invoke-direct<br/>
763    71: invoke-static<br/>
764    72: invoke-interface
765  </td>
766  <td>
767    <code>A:</code> argument word count (4 bits)<br/>
768    <code>B:</code> method reference index (16 bits)<br/>
769    <code>C..G:</code> argument registers (4 bits each)
770  </td>
771  <td>Call the indicated method. The result (if any) may be stored
772    with an appropriate <code>move-result*</code> variant as the immediately
773    subsequent instruction.
774    <p><code>invoke-virtual</code> is used to invoke a normal virtual
775    method (a method that is not <code>private</code>, <code>static</code>,
776    or <code>final</code>, and is also not a constructor).</p>
777    <p><code>invoke-super</code> is used to invoke the closest superclass's
778    virtual method (as opposed to the one with the same <code>method_id</code>
779    in the calling class). The same method restrictions hold as for
780    <code>invoke-virtual</code>.</p>
781    <p><code>invoke-direct</code> is used to invoke a non-<code>static</code>
782    direct method (that is, an instance method that is by its nature
783    non-overridable, namely either a <code>private</code> instance method
784    or a constructor).</p>
785    <p><code>invoke-static</code> is used to invoke a <code>static</code>
786    method (which is always considered a direct method).</p>
787    <p><code>invoke-interface</code> is used to invoke an
788    <code>interface</code> method, that is, on an object whose concrete
789    class isn't known, using a <code>method_id</code> that refers to
790    an <code>interface</code>.</p>
791    <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
792    altering the method argument to be a more direct offset
793    (or pair thereof).</p>
794  </td>
795</tr>
796<tr>
797  <td>73 10x</td>
798  <td><i>(unused)</i></td>
799  <td>&nbsp;</td>
800  <td><i>(unused)</i></td>
801</tr>
802<tr>
803  <td>74..78 3rc</td>
804  <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/>
805    74: invoke-virtual/range<br/>
806    75: invoke-super/range<br/>
807    76: invoke-direct/range<br/>
808    77: invoke-static/range<br/>
809    78: invoke-interface/range
810  </td>
811  <td><code>A:</code> argument word count (8 bits)<br/>
812    <code>B:</code> method reference index (16 bits)<br/>
813    <code>C:</code> first argument register (16 bits)<br/>
814    <code>N = A + C - 1</code></td>
815  <td>Call the indicated method. See first <code>invoke-<i>kind</i></code>
816    description above for details, caveats, and suggestions.
817  </td>
818</tr>
819<tr>
820  <td>79..7a 10x</td>
821  <td><i>(unused)</i></td>
822  <td>&nbsp;</td>
823  <td><i>(unused)</i></td>
824</tr>
825<tr>
826  <td>7b..8f 12x</td>
827  <td><i>unop</i> vA, vB<br/>
828    7b: neg-int<br/>
829    7c: not-int<br/>
830    7d: neg-long<br/>
831    7e: not-long<br/>
832    7f: neg-float<br/>
833    80: neg-double<br/>
834    81: int-to-long<br/>
835    82: int-to-float<br/>
836    83: int-to-double<br/>
837    84: long-to-int<br/>
838    85: long-to-float<br/>
839    86: long-to-double<br/>
840    87: float-to-int<br/>
841    88: float-to-long<br/>
842    89: float-to-double<br/>
843    8a: double-to-int<br/>
844    8b: double-to-long<br/>
845    8c: double-to-float<br/>
846    8d: int-to-byte<br/>
847    8e: int-to-char<br/>
848    8f: int-to-short
849  </td>
850  <td><code>A:</code> destination register or pair (4 bits)<br/>
851    <code>B:</code> source register or pair (4 bits)</td>
852  <td>Perform the identified unary operation on the source register,
853    storing the result in the destination register.</td>
854</tr>
855
856<tr>
857  <td>90..af 23x</td>
858  <td><i>binop</i> vAA, vBB, vCC<br/>
859    90: add-int<br/>
860    91: sub-int<br/>
861    92: mul-int<br/>
862    93: div-int<br/>
863    94: rem-int<br/>
864    95: and-int<br/>
865    96: or-int<br/>
866    97: xor-int<br/>
867    98: shl-int<br/>
868    99: shr-int<br/>
869    9a: ushr-int<br/>
870    9b: add-long<br/>
871    9c: sub-long<br/>
872    9d: mul-long<br/>
873    9e: div-long<br/>
874    9f: rem-long<br/>
875    a0: and-long<br/>
876    a1: or-long<br/>
877    a2: xor-long<br/>
878    a3: shl-long<br/>
879    a4: shr-long<br/>
880    a5: ushr-long<br/>
881    a6: add-float<br/>
882    a7: sub-float<br/>
883    a8: mul-float<br/>
884    a9: div-float<br/>
885    aa: rem-float<br/>
886    ab: add-double<br/>
887    ac: sub-double<br/>
888    ad: mul-double<br/>
889    ae: div-double<br/>
890    af: rem-double
891  </td>
892  <td><code>A:</code> destination register or pair (8 bits)<br/>
893    <code>B:</code> first source register or pair (8 bits)<br/>
894    <code>C:</code> second source register or pair (8 bits)</td>
895  <td>Perform the identified binary operation on the two source registers,
896    storing the result in the first source register.</td>
897</tr>
898<tr>
899  <td>b0..cf 12x</td>
900  <td><i>binop</i>/2addr vA, vB<br/>
901    b0: add-int/2addr<br/>
902    b1: sub-int/2addr<br/>
903    b2: mul-int/2addr<br/>
904    b3: div-int/2addr<br/>
905    b4: rem-int/2addr<br/>
906    b5: and-int/2addr<br/>
907    b6: or-int/2addr<br/>
908    b7: xor-int/2addr<br/>
909    b8: shl-int/2addr<br/>
910    b9: shr-int/2addr<br/>
911    ba: ushr-int/2addr<br/>
912    bb: add-long/2addr<br/>
913    bc: sub-long/2addr<br/>
914    bd: mul-long/2addr<br/>
915    be: div-long/2addr<br/>
916    bf: rem-long/2addr<br/>
917    c0: and-long/2addr<br/>
918    c1: or-long/2addr<br/>
919    c2: xor-long/2addr<br/>
920    c3: shl-long/2addr<br/>
921    c4: shr-long/2addr<br/>
922    c5: ushr-long/2addr<br/>
923    c6: add-float/2addr<br/>
924    c7: sub-float/2addr<br/>
925    c8: mul-float/2addr<br/>
926    c9: div-float/2addr<br/>
927    ca: rem-float/2addr<br/>
928    cb: add-double/2addr<br/>
929    cc: sub-double/2addr<br/>
930    cd: mul-double/2addr<br/>
931    ce: div-double/2addr<br/>
932    cf: rem-double/2addr
933  </td>
934  <td><code>A:</code> destination and first source register or pair
935      (4 bits)<br/>
936    <code>B:</code> second source register or pair (4 bits)</td>
937  <td>Perform the identified binary operation on the two source registers,
938    storing the result in the first source register.</td>
939</tr>
940<tr>
941  <td>d0..d7 22s</td>
942  <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/>
943    d0: add-int/lit16<br/>
944    d1: rsub-int (reverse subtract)<br/>
945    d2: mul-int/lit16<br/>
946    d3: div-int/lit16<br/>
947    d4: rem-int/lit16<br/>
948    d5: and-int/lit16<br/>
949    d6: or-int/lit16<br/>
950    d7: xor-int/lit16
951  </td>
952  <td><code>A:</code> destination register (4 bits)<br/>
953    <code>B:</code> source register (4 bits)<br/>
954    <code>C:</code> signed int constant (16 bits)</td>
955  <td>Perform the indicated binary op on the indicated register (first
956    argument) and literal value (second argument), storing the result in
957    the destination register.
958    <p><b>Note:</b>
959    <code>rsub-int</code> does not have a suffix since this version is the
960    main opcode of its family. Also, see below for details on its semantics.
961    </p>
962  </td>
963</tr>
964<tr>
965  <td>d8..e2 22b</td>
966  <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/>
967    d8: add-int/lit8<br/>
968    d9: rsub-int/lit8<br/>
969    da: mul-int/lit8<br/>
970    db: div-int/lit8<br/>
971    dc: rem-int/lit8<br/>
972    dd: and-int/lit8<br/>
973    de: or-int/lit8<br/>
974    df: xor-int/lit8<br/>
975    e0: shl-int/lit8<br/>
976    e1: shr-int/lit8<br/>
977    e2: ushr-int/lit8
978  </td>
979  <td><code>A:</code> destination register (8 bits)<br/>
980    <code>B:</code> source register (8 bits)<br/>
981    <code>C:</code> signed int constant (8 bits)</td>
982  <td>Perform the indicated binary op on the indicated register (first
983    argument) and literal value (second argument), storing the result
984    in the destination register.
985    <p><b>Note:</b> See below for details on the semantics of
986    <code>rsub-int</code>.</p>
987  </td>
988</tr>
989<tr>
990  <td>e3..ff 10x</td>
991  <td><i>(unused)</i></td>
992  <td>&nbsp;</td>
993  <td><i>(unused)</i></td>
994</tr>
995</tbody>
996</table>
997
998<h2 id="packed-switch">packed-switch-payload format</h2>
999
1000<table class="supplement">
1001<thead>
1002<tr>
1003  <th>Name</th>
1004  <th>Format</th>
1005  <th>Description</th>
1006</tr>
1007</thead>
1008<tbody>
1009<tr>
1010  <td>ident</td>
1011  <td>ushort = 0x0100</td>
1012  <td>identifying pseudo-opcode</td>
1013</tr>
1014<tr>
1015  <td>size</td>
1016  <td>ushort</td>
1017  <td>number of entries in the table</td>
1018</tr>
1019<tr>
1020  <td>first_key</td>
1021  <td>int</td>
1022  <td>first (and lowest) switch case value</td>
1023</tr>
1024<tr>
1025  <td>targets</td>
1026  <td>int[]</td>
1027  <td>list of <code>size</code> relative branch targets. The targets are
1028    relative to the address of the switch opcode, not of this table.
1029  </td>
1030</tr>
1031</tbody>
1032</table>
1033
1034<p><b>Note:</b> The total number of code units for an instance of this
1035table is <code>(size * 2) + 4</code>.</p>
1036
1037<h2 id="sparse-switch">sparse-switch-payload format</h2>
1038
1039<table class="supplement">
1040<thead>
1041<tr>
1042  <th>Name</th>
1043  <th>Format</th>
1044  <th>Description</th>
1045</tr>
1046</thead>
1047<tbody>
1048<tr>
1049  <td>ident</td>
1050  <td>ushort = 0x0200</td>
1051  <td>identifying pseudo-opcode</td>
1052</tr>
1053<tr>
1054  <td>size</td>
1055  <td>ushort</td>
1056  <td>number of entries in the table</td>
1057</tr>
1058<tr>
1059  <td>keys</td>
1060  <td>int[]</td>
1061  <td>list of <code>size</code> key values, sorted low-to-high</td>
1062</tr>
1063<tr>
1064  <td>targets</td>
1065  <td>int[]</td>
1066  <td>list of <code>size</code> relative branch targets, each corresponding
1067    to the key value at the same index. The targets are
1068    relative to the address of the switch opcode, not of this table.
1069  </td>
1070</tr>
1071</tbody>
1072</table>
1073
1074<p><b>Note:</b> The total number of code units for an instance of this
1075table is <code>(size * 4) + 2</code>.</p>
1076
1077<h2 id="fill-array">fill-array-data-payload format</h2>
1078
1079<table class="supplement">
1080<thead>
1081<tr>
1082  <th>Name</th>
1083  <th>Format</th>
1084  <th>Description</th>
1085</tr>
1086</thead>
1087<tbody>
1088<tr>
1089  <td>ident</td>
1090  <td>ushort = 0x0300</td>
1091  <td>identifying pseudo-opcode</td>
1092</tr>
1093<tr>
1094  <td>element_width</td>
1095  <td>ushort</td>
1096  <td>number of bytes in each element</td>
1097</tr>
1098<tr>
1099  <td>size</td>
1100  <td>uint</td>
1101  <td>number of elements in the table</td>
1102</tr>
1103<tr>
1104  <td>data</td>
1105  <td>ubyte[]</td>
1106  <td>data values</td>
1107</tr>
1108</tbody>
1109</table>
1110
1111<p><b>Note:</b> The total number of code units for an instance of this
1112table is <code>(size * element_width + 1) / 2 + 4</code>.</p>
1113
1114
1115<h2 id="math">Mathematical operation details</h2>
1116
1117<p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using
1118round-to-nearest and gradual underflow, except where stated otherwise.</p>
1119
1120<table class="math">
1121<thead>
1122<tr>
1123  <th>Opcode</th>
1124  <th>C Semantics</th>
1125  <th>Notes</th>
1126</tr>
1127</thead>
1128<tbody>
1129<tr>
1130  <td>neg-int</td>
1131  <td>int32 a;<br/>
1132    int32 result = -a;
1133  </td>
1134  <td>Unary twos-complement.</td>
1135</tr>
1136<tr>
1137  <td>not-int</td>
1138  <td>int32 a;<br/>
1139    int32 result = ~a;
1140  </td>
1141  <td>Unary ones-complement.</td>
1142</tr>
1143<tr>
1144  <td>neg-long</td>
1145  <td>int64 a;<br/>
1146    int64 result = -a;
1147  </td>
1148  <td>Unary twos-complement.</td>
1149</tr>
1150<tr>
1151  <td>not-long</td>
1152  <td>int64 a;<br/>
1153    int64 result = ~a;
1154  </td>
1155  <td>Unary ones-complement.</td>
1156</tr>
1157<tr>
1158  <td>neg-float</td>
1159  <td>float a;<br/>
1160    float result = -a;
1161  </td>
1162  <td>Floating point negation.</td>
1163</tr>
1164<tr>
1165  <td>neg-double</td>
1166  <td>double a;<br/>
1167    double result = -a;
1168  </td>
1169  <td>Floating point negation.</td>
1170</tr>
1171<tr>
1172  <td>int-to-long</td>
1173  <td>int32 a;<br/>
1174    int64 result = (int64) a;
1175  </td>
1176  <td>Sign extension of <code>int32</code> into <code>int64</code>.</td>
1177</tr>
1178<tr>
1179  <td>int-to-float</td>
1180  <td>int32 a;<br/>
1181    float result = (float) a;
1182  </td>
1183  <td>Conversion of <code>int32</code> to <code>float</code>, using
1184    round-to-nearest. This loses precision for some values.
1185  </td>
1186</tr>
1187<tr>
1188  <td>int-to-double</td>
1189  <td>int32 a;<br/>
1190    double result = (double) a;
1191  </td>
1192  <td>Conversion of <code>int32</code> to <code>double</code>.</td>
1193</tr>
1194<tr>
1195  <td>long-to-int</td>
1196  <td>int64 a;<br/>
1197    int32 result = (int32) a;
1198  </td>
1199  <td>Truncation of <code>int64</code> into <code>int32</code>.</td>
1200</tr>
1201<tr>
1202  <td>long-to-float</td>
1203  <td>int64 a;<br/>
1204    float result = (float) a;
1205  </td>
1206  <td>Conversion of <code>int64</code> to <code>float</code>, using
1207    round-to-nearest. This loses precision for some values.
1208  </td>
1209</tr>
1210<tr>
1211  <td>long-to-double</td>
1212  <td>int64 a;<br/>
1213    double result = (double) a;
1214  </td>
1215  <td>Conversion of <code>int64</code> to <code>double</code>, using
1216    round-to-nearest. This loses precision for some values.
1217  </td>
1218</tr>
1219<tr>
1220  <td>float-to-int</td>
1221  <td>float a;<br/>
1222    int32 result = (int32) a;
1223  </td>
1224  <td>Conversion of <code>float</code> to <code>int32</code>, using
1225    round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero)
1226    convert to the integer <code>0</code>. Infinities and values with
1227    too large a magnitude to be represented get converted to either
1228    <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign.
1229  </td>
1230</tr>
1231<tr>
1232  <td>float-to-long</td>
1233  <td>float a;<br/>
1234    int64 result = (int64) a;
1235  </td>
1236  <td>Conversion of <code>float</code> to <code>int64</code>, using
1237    round-toward-zero. The same special case rules as for
1238    <code>float-to-int</code> apply here, except that out-of-range values
1239    get converted to either <code>0x7fffffffffffffff</code> or
1240    <code>-0x8000000000000000</code> depending on sign.
1241  </td>
1242</tr>
1243<tr>
1244  <td>float-to-double</td>
1245  <td>float a;<br/>
1246    double result = (double) a;
1247  </td>
1248  <td>Conversion of <code>float</code> to <code>double</code>, preserving
1249    the value exactly.
1250  </td>
1251</tr>
1252<tr>
1253  <td>double-to-int</td>
1254  <td>double a;<br/>
1255    int32 result = (int32) a;
1256  </td>
1257  <td>Conversion of <code>double</code> to <code>int32</code>, using
1258    round-toward-zero. The same special case rules as for
1259    <code>float-to-int</code> apply here.
1260  </td>
1261</tr>
1262<tr>
1263  <td>double-to-long</td>
1264  <td>double a;<br/>
1265    int64 result = (int64) a;
1266  </td>
1267  <td>Conversion of <code>double</code> to <code>int64</code>, using
1268    round-toward-zero. The same special case rules as for
1269    <code>float-to-long</code> apply here.
1270  </td>
1271</tr>
1272<tr>
1273  <td>double-to-float</td>
1274  <td>double a;<br/>
1275    float result = (float) a;
1276  </td>
1277  <td>Conversion of <code>double</code> to <code>float</code>, using
1278    round-to-nearest. This loses precision for some values.
1279  </td>
1280</tr>
1281<tr>
1282  <td>int-to-byte</td>
1283  <td>int32 a;<br/>
1284    int32 result = (a &lt;&lt; 24) &gt;&gt; 24;
1285  </td>
1286  <td>Truncation of <code>int32</code> to <code>int8</code>, sign
1287    extending the result.
1288  </td>
1289</tr>
1290<tr>
1291  <td>int-to-char</td>
1292  <td>int32 a;<br/>
1293    int32 result = a &amp; 0xffff;
1294  </td>
1295  <td>Truncation of <code>int32</code> to <code>uint16</code>, without
1296    sign extension.
1297  </td>
1298</tr>
1299<tr>
1300  <td>int-to-short</td>
1301  <td>int32 a;<br/>
1302    int32 result = (a &lt;&lt; 16) &gt;&gt; 16;
1303  </td>
1304  <td>Truncation of <code>int32</code> to <code>int16</code>, sign
1305    extending the result.
1306  </td>
1307</tr>
1308<tr>
1309  <td>add-int</td>
1310  <td>int32 a, b;<br/>
1311    int32 result = a + b;
1312  </td>
1313  <td>Twos-complement addition.</td>
1314</tr>
1315<tr>
1316  <td>sub-int</td>
1317  <td>int32 a, b;<br/>
1318    int32 result = a - b;
1319  </td>
1320  <td>Twos-complement subtraction.</td>
1321</tr>
1322<tr>
1323  <td>rsub-int</td>
1324  <td>int32 a, b;<br/>
1325    int32 result = b - a;
1326  </td>
1327  <td>Twos-complement reverse subtraction.</td>
1328</tr>
1329<tr>
1330  <td>mul-int</td>
1331  <td>int32 a, b;<br/>
1332    int32 result = a * b;
1333  </td>
1334  <td>Twos-complement multiplication.</td>
1335</tr>
1336<tr>
1337  <td>div-int</td>
1338  <td>int32 a, b;<br/>
1339    int32 result = a / b;
1340  </td>
1341  <td>Twos-complement division, rounded towards zero (that is, truncated to
1342    integer). This throws <code>ArithmeticException</code> if
1343    <code>b == 0</code>.
1344  </td>
1345</tr>
1346<tr>
1347  <td>rem-int</td>
1348  <td>int32 a, b;<br/>
1349    int32 result = a % b;
1350  </td>
1351  <td>Twos-complement remainder after division. The sign of the result
1352    is the same as that of <code>a</code>, and it is more precisely
1353    defined as <code>result == a - (a / b) * b</code>. This throws
1354    <code>ArithmeticException</code> if <code>b == 0</code>.
1355  </td>
1356</tr>
1357<tr>
1358  <td>and-int</td>
1359  <td>int32 a, b;<br/>
1360    int32 result = a &amp; b;
1361  </td>
1362  <td>Bitwise AND.</td>
1363</tr>
1364<tr>
1365  <td>or-int</td>
1366  <td>int32 a, b;<br/>
1367    int32 result = a | b;
1368  </td>
1369  <td>Bitwise OR.</td>
1370</tr>
1371<tr>
1372  <td>xor-int</td>
1373  <td>int32 a, b;<br/>
1374    int32 result = a ^ b;
1375  </td>
1376  <td>Bitwise XOR.</td>
1377</tr>
1378<tr>
1379  <td>shl-int</td>
1380  <td>int32 a, b;<br/>
1381    int32 result = a &lt;&lt; (b &amp; 0x1f);
1382  </td>
1383  <td>Bitwise shift left (with masked argument).</td>
1384</tr>
1385<tr>
1386  <td>shr-int</td>
1387  <td>int32 a, b;<br/>
1388    int32 result = a &gt;&gt; (b &amp; 0x1f);
1389  </td>
1390  <td>Bitwise signed shift right (with masked argument).</td>
1391</tr>
1392<tr>
1393  <td>ushr-int</td>
1394  <td>uint32 a, b;<br/>
1395    int32 result = a &gt;&gt; (b &amp; 0x1f);
1396  </td>
1397  <td>Bitwise unsigned shift right (with masked argument).</td>
1398</tr>
1399<tr>
1400  <td>add-long</td>
1401  <td>int64 a, b;<br/>
1402    int64 result = a + b;
1403  </td>
1404  <td>Twos-complement addition.</td>
1405</tr>
1406<tr>
1407  <td>sub-long</td>
1408  <td>int64 a, b;<br/>
1409    int64 result = a - b;
1410  </td>
1411  <td>Twos-complement subtraction.</td>
1412</tr>
1413<tr>
1414  <td>mul-long</td>
1415  <td>int64 a, b;<br/>
1416    int64 result = a * b;
1417  </td>
1418  <td>Twos-complement multiplication.</td>
1419</tr>
1420<tr>
1421  <td>div-long</td>
1422  <td>int64 a, b;<br/>
1423    int64 result = a / b;
1424  </td>
1425  <td>Twos-complement division, rounded towards zero (that is, truncated to
1426    integer). This throws <code>ArithmeticException</code> if
1427    <code>b == 0</code>.
1428  </td>
1429</tr>
1430<tr>
1431  <td>rem-long</td>
1432  <td>int64 a, b;<br/>
1433    int64 result = a % b;
1434  </td>
1435  <td>Twos-complement remainder after division. The sign of the result
1436    is the same as that of <code>a</code>, and it is more precisely
1437    defined as <code>result == a - (a / b) * b</code>. This throws
1438    <code>ArithmeticException</code> if <code>b == 0</code>.
1439  </td>
1440</tr>
1441<tr>
1442  <td>and-long</td>
1443  <td>int64 a, b;<br/>
1444    int64 result = a &amp; b;
1445  </td>
1446  <td>Bitwise AND.</td>
1447</tr>
1448<tr>
1449  <td>or-long</td>
1450  <td>int64 a, b;<br/>
1451    int64 result = a | b;
1452  </td>
1453  <td>Bitwise OR.</td>
1454</tr>
1455<tr>
1456  <td>xor-long</td>
1457  <td>int64 a, b;<br/>
1458    int64 result = a ^ b;
1459  </td>
1460  <td>Bitwise XOR.</td>
1461</tr>
1462<tr>
1463  <td>shl-long</td>
1464  <td>int64 a, b;<br/>
1465    int64 result = a &lt;&lt; (b &amp; 0x3f);
1466  </td>
1467  <td>Bitwise shift left (with masked argument).</td>
1468</tr>
1469<tr>
1470  <td>shr-long</td>
1471  <td>int64 a, b;<br/>
1472    int64 result = a &gt;&gt; (b &amp; 0x3f);
1473  </td>
1474  <td>Bitwise signed shift right (with masked argument).</td>
1475</tr>
1476<tr>
1477  <td>ushr-long</td>
1478  <td>uint64 a, b;<br/>
1479    int64 result = a &gt;&gt; (b &amp; 0x3f);
1480  </td>
1481  <td>Bitwise unsigned shift right (with masked argument).</td>
1482</tr>
1483<tr>
1484  <td>add-float</td>
1485  <td>float a, b;<br/>
1486    float result = a + b;
1487  </td>
1488  <td>Floating point addition.</td>
1489</tr>
1490<tr>
1491  <td>sub-float</td>
1492  <td>float a, b;<br/>
1493    float result = a - b;
1494  </td>
1495  <td>Floating point subtraction.</td>
1496</tr>
1497<tr>
1498  <td>mul-float</td>
1499  <td>float a, b;<br/>
1500    float result = a * b;
1501  </td>
1502  <td>Floating point multiplication.</td>
1503</tr>
1504<tr>
1505  <td>div-float</td>
1506  <td>float a, b;<br/>
1507    float result = a / b;
1508  </td>
1509  <td>Floating point division.</td>
1510</tr>
1511<tr>
1512  <td>rem-float</td>
1513  <td>float a, b;<br/>
1514    float result = a % b;
1515  </td>
1516  <td>Floating point remainder after division. This function is different
1517    than IEEE 754 remainder and is defined as
1518    <code>result == a - roundTowardZero(a / b) * b</code>.
1519  </td>
1520</tr>
1521<tr>
1522  <td>add-double</td>
1523  <td>double a, b;<br/>
1524    double result = a + b;
1525  </td>
1526  <td>Floating point addition.</td>
1527</tr>
1528<tr>
1529  <td>sub-double</td>
1530  <td>double a, b;<br/>
1531    double result = a - b;
1532  </td>
1533  <td>Floating point subtraction.</td>
1534</tr>
1535<tr>
1536  <td>mul-double</td>
1537  <td>double a, b;<br/>
1538    double result = a * b;
1539  </td>
1540  <td>Floating point multiplication.</td>
1541</tr>
1542<tr>
1543  <td>div-double</td>
1544  <td>double a, b;<br/>
1545    double result = a / b;
1546  </td>
1547  <td>Floating point division.</td>
1548</tr>
1549<tr>
1550  <td>rem-double</td>
1551  <td>double a, b;<br/>
1552    double result = a % b;
1553  </td>
1554  <td>Floating point remainder after division. This function is different
1555    than IEEE 754 remainder and is defined as
1556    <code>result == a - roundTowardZero(a / b) * b</code>.
1557  </td>
1558</tr>
1559</tbody>
1560</table>
1561