1 /* Copyright (c) 2009-2013, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 */ 13 #ifndef __LINUX_MSM_CAMERA_H 14 #define __LINUX_MSM_CAMERA_H 15 16 #ifdef MSM_CAMERA_BIONIC 17 #include <sys/types.h> 18 #endif 19 #include <linux/videodev2.h> 20 #include <linux/types.h> 21 #include <linux/ioctl.h> 22 #ifdef __KERNEL__ 23 #include <linux/cdev.h> 24 #endif 25 #ifdef MSM_CAMERA_GCC 26 #include <time.h> 27 #else 28 #include <linux/time.h> 29 #endif 30 31 #include <linux/msm_ion.h> 32 33 #define BIT(nr) (1UL << (nr)) 34 35 #define MSM_CAM_IOCTL_MAGIC 'm' 36 37 #define MAX_SERVER_PAYLOAD_LENGTH 8192 38 39 #define MSM_CAM_IOCTL_GET_SENSOR_INFO \ 40 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *) 41 42 #define MSM_CAM_IOCTL_REGISTER_PMEM \ 43 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *) 44 45 #define MSM_CAM_IOCTL_UNREGISTER_PMEM \ 46 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned) 47 48 #define MSM_CAM_IOCTL_CTRL_COMMAND \ 49 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *) 50 51 #define MSM_CAM_IOCTL_CONFIG_VFE \ 52 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *) 53 54 #define MSM_CAM_IOCTL_GET_STATS \ 55 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *) 56 57 #define MSM_CAM_IOCTL_GETFRAME \ 58 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *) 59 60 #define MSM_CAM_IOCTL_ENABLE_VFE \ 61 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *) 62 63 #define MSM_CAM_IOCTL_CTRL_CMD_DONE \ 64 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *) 65 66 #define MSM_CAM_IOCTL_CONFIG_CMD \ 67 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *) 68 69 #define MSM_CAM_IOCTL_DISABLE_VFE \ 70 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *) 71 72 #define MSM_CAM_IOCTL_PAD_REG_RESET2 \ 73 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *) 74 75 #define MSM_CAM_IOCTL_VFE_APPS_RESET \ 76 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *) 77 78 #define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \ 79 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *) 80 81 #define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \ 82 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *) 83 84 #define MSM_CAM_IOCTL_AXI_CONFIG \ 85 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *) 86 87 #define MSM_CAM_IOCTL_GET_PICTURE \ 88 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *) 89 90 #define MSM_CAM_IOCTL_SET_CROP \ 91 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *) 92 93 #define MSM_CAM_IOCTL_PICT_PP \ 94 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *) 95 96 #define MSM_CAM_IOCTL_PICT_PP_DONE \ 97 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *) 98 99 #define MSM_CAM_IOCTL_SENSOR_IO_CFG \ 100 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *) 101 102 #define MSM_CAM_IOCTL_FLASH_LED_CFG \ 103 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *) 104 105 #define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \ 106 _IO(MSM_CAM_IOCTL_MAGIC, 23) 107 108 #define MSM_CAM_IOCTL_CTRL_COMMAND_2 \ 109 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *) 110 111 #define MSM_CAM_IOCTL_AF_CTRL \ 112 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *) 113 114 #define MSM_CAM_IOCTL_AF_CTRL_DONE \ 115 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *) 116 117 #define MSM_CAM_IOCTL_CONFIG_VPE \ 118 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *) 119 120 #define MSM_CAM_IOCTL_AXI_VPE_CONFIG \ 121 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *) 122 123 #define MSM_CAM_IOCTL_STROBE_FLASH_CFG \ 124 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *) 125 126 #define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \ 127 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *) 128 129 #define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \ 130 _IO(MSM_CAM_IOCTL_MAGIC, 31) 131 132 #define MSM_CAM_IOCTL_FLASH_CTRL \ 133 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *) 134 135 #define MSM_CAM_IOCTL_ERROR_CONFIG \ 136 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *) 137 138 #define MSM_CAM_IOCTL_ABORT_CAPTURE \ 139 _IO(MSM_CAM_IOCTL_MAGIC, 34) 140 141 #define MSM_CAM_IOCTL_SET_FD_ROI \ 142 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *) 143 144 #define MSM_CAM_IOCTL_GET_CAMERA_INFO \ 145 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *) 146 147 #define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \ 148 _IO(MSM_CAM_IOCTL_MAGIC, 37) 149 150 #define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \ 151 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *) 152 153 #define MSM_CAM_IOCTL_PUT_ST_FRAME \ 154 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *) 155 156 #define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \ 157 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload) 158 159 #define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \ 160 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *) 161 162 #define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \ 163 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *) 164 165 #define MSM_CAM_IOCTL_MCTL_POST_PROC \ 166 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *) 167 168 #define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \ 169 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *) 170 171 #define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \ 172 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *) 173 174 #define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \ 175 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *) 176 177 #define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \ 178 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control) 179 180 #define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \ 181 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl) 182 183 #define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \ 184 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *) 185 186 #define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \ 187 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *) 188 189 #define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \ 190 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *) 191 192 #define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \ 193 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *) 194 195 #define MSM_CAM_IOCTL_EEPROM_IO_CFG \ 196 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *) 197 198 #define MSM_CAM_IOCTL_ISPIF_IO_CFG \ 199 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *) 200 201 #define MSM_CAM_IOCTL_STATS_REQBUF \ 202 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *) 203 204 #define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \ 205 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *) 206 207 #define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \ 208 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *) 209 210 #define MSM_CAM_IOCTL_SET_MCTL_SDEV \ 211 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *) 212 213 #define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \ 214 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *) 215 216 #define MSM_CAM_IOCTL_GET_INST_HANDLE \ 217 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *) 218 219 #define MSM_CAM_IOCTL_STATS_UNREG_BUF \ 220 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *) 221 222 #define MSM_CAM_IOCTL_CSIC_IO_CFG \ 223 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *) 224 225 #define MSM_CAM_IOCTL_CSID_IO_CFG \ 226 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *) 227 228 #define MSM_CAM_IOCTL_CSIPHY_IO_CFG \ 229 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *) 230 231 #define MSM_CAM_IOCTL_OEM \ 232 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *) 233 234 #define MSM_CAM_IOCTL_AXI_INIT \ 235 _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *) 236 237 #define MSM_CAM_IOCTL_AXI_RELEASE \ 238 _IO(MSM_CAM_IOCTL_MAGIC, 67) 239 240 struct v4l2_event_and_payload { 241 struct v4l2_event evt; 242 uint32_t payload_length; 243 uint32_t transaction_id; 244 void *payload; 245 }; 246 247 struct msm_stats_reqbuf { 248 int num_buf; /* how many buffers requested */ 249 int stats_type; /* stats type */ 250 }; 251 252 struct msm_stats_flush_bufq { 253 int stats_type; /* enum msm_stats_enum_type */ 254 }; 255 256 struct msm_mctl_pp_cmd { 257 int32_t id; 258 uint16_t length; 259 void *value; 260 }; 261 262 struct msm_mctl_post_proc_cmd { 263 int32_t type; 264 struct msm_mctl_pp_cmd cmd; 265 }; 266 267 #define MSM_CAMERA_LED_OFF 0 268 #define MSM_CAMERA_LED_LOW 1 269 #define MSM_CAMERA_LED_HIGH 2 270 #define MSM_CAMERA_LED_INIT 3 271 #define MSM_CAMERA_LED_RELEASE 4 272 273 #define MSM_CAMERA_STROBE_FLASH_NONE 0 274 #define MSM_CAMERA_STROBE_FLASH_XENON 1 275 276 #define MSM_MAX_CAMERA_SENSORS 5 277 #define MAX_SENSOR_NAME 32 278 #define MAX_CAM_NAME_SIZE 32 279 #define MAX_ACT_MOD_NAME_SIZE 32 280 #define MAX_ACT_NAME_SIZE 32 281 #define NUM_ACTUATOR_DIR 2 282 #define MAX_ACTUATOR_SCENARIO 8 283 #define MAX_ACTUATOR_REGION 5 284 #define MAX_ACTUATOR_INIT_SET 12 285 #define MAX_ACTUATOR_TYPE_SIZE 32 286 #define MAX_ACTUATOR_REG_TBL_SIZE 8 287 288 289 #define MSM_MAX_CAMERA_CONFIGS 2 290 291 #define PP_SNAP 0x01 292 #define PP_RAW_SNAP ((0x01)<<1) 293 #define PP_PREV ((0x01)<<2) 294 #define PP_THUMB ((0x01)<<3) 295 #define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB) 296 297 #define MSM_CAM_CTRL_CMD_DONE 0 298 #define MSM_CAM_SENSOR_VFE_CMD 1 299 300 /* Should be same as VIDEO_MAX_PLANES in videodev2.h */ 301 #define MAX_PLANES 8 302 303 /***************************************************** 304 * structure 305 *****************************************************/ 306 307 /* define five type of structures for userspace <==> kernel 308 * space communication: 309 * command 1 - 2 are from userspace ==> kernel 310 * command 3 - 4 are from kernel ==> userspace 311 * 312 * 1. control command: control command(from control thread), 313 * control status (from config thread); 314 */ 315 struct msm_ctrl_cmd { 316 uint16_t type; 317 uint16_t length; 318 void *value; 319 uint16_t status; 320 uint32_t timeout_ms; 321 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */ 322 int vnode_id; /* video dev id. Can we overload resp_fd? */ 323 int queue_idx; 324 uint32_t evt_id; 325 uint32_t stream_type; /* used to pass value to qcamera server */ 326 int config_ident; /*used as identifier for config node*/ 327 }; 328 329 struct msm_cam_evt_msg { 330 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */ 331 unsigned short msg_id; 332 unsigned int len; /* size in, number of bytes out */ 333 uint32_t frame_id; 334 void *data; 335 struct timespec timestamp; 336 }; 337 338 struct msm_pp_frame_sp { 339 /* phy addr of the buffer */ 340 unsigned long phy_addr; 341 uint32_t y_off; 342 uint32_t cbcr_off; 343 /* buffer length */ 344 uint32_t length; 345 int32_t fd; 346 uint32_t addr_offset; 347 /* mapped addr */ 348 unsigned long vaddr; 349 }; 350 351 struct msm_pp_frame_mp { 352 /* phy addr of the plane */ 353 unsigned long phy_addr; 354 /* offset of plane data */ 355 uint32_t data_offset; 356 /* plane length */ 357 uint32_t length; 358 int32_t fd; 359 uint32_t addr_offset; 360 /* mapped addr */ 361 unsigned long vaddr; 362 }; 363 364 struct msm_pp_frame { 365 uint32_t handle; /* stores vb cookie */ 366 uint32_t frame_id; 367 unsigned short buf_idx; 368 int path; 369 unsigned short image_type; 370 unsigned short num_planes; /* 1 for sp */ 371 struct timeval timestamp; 372 union { 373 struct msm_pp_frame_sp sp; 374 struct msm_pp_frame_mp mp[MAX_PLANES]; 375 }; 376 int node_type; 377 uint32_t inst_handle; 378 }; 379 380 struct msm_pp_crop { 381 uint32_t src_x; 382 uint32_t src_y; 383 uint32_t src_w; 384 uint32_t src_h; 385 uint32_t dst_x; 386 uint32_t dst_y; 387 uint32_t dst_w; 388 uint32_t dst_h; 389 uint8_t update_flag; 390 }; 391 392 struct msm_mctl_pp_frame_cmd { 393 uint32_t cookie; 394 uint8_t vpe_output_action; 395 struct msm_pp_frame src_frame; 396 struct msm_pp_frame dest_frame; 397 struct msm_pp_crop crop; 398 int path; 399 }; 400 401 struct msm_cam_evt_divert_frame { 402 unsigned short image_mode; 403 unsigned short op_mode; 404 unsigned short inst_idx; 405 unsigned short node_idx; 406 struct msm_pp_frame frame; 407 int do_pp; 408 }; 409 410 struct msm_mctl_pp_cmd_ack_event { 411 uint32_t cmd; /* VPE_CMD_ZOOM? */ 412 int status; /* 0 done, < 0 err */ 413 uint32_t cookie; /* daemon's cookie */ 414 }; 415 416 struct msm_mctl_pp_event_info { 417 int32_t event; 418 union { 419 struct msm_mctl_pp_cmd_ack_event ack; 420 }; 421 }; 422 423 struct msm_isp_event_ctrl { 424 unsigned short resptype; 425 union { 426 struct msm_cam_evt_msg isp_msg; 427 struct msm_ctrl_cmd ctrl; 428 struct msm_cam_evt_divert_frame div_frame; 429 struct msm_mctl_pp_event_info pp_event_info; 430 } isp_data; 431 }; 432 433 #define MSM_CAM_RESP_CTRL 0 434 #define MSM_CAM_RESP_STAT_EVT_MSG 1 435 #define MSM_CAM_RESP_STEREO_OP_1 2 436 #define MSM_CAM_RESP_STEREO_OP_2 3 437 #define MSM_CAM_RESP_V4L2 4 438 #define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5 439 #define MSM_CAM_RESP_DONE_EVENT 6 440 #define MSM_CAM_RESP_MCTL_PP_EVENT 7 441 #define MSM_CAM_RESP_MAX 8 442 443 #define MSM_CAM_APP_NOTIFY_EVENT 0 444 #define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1 445 446 /* this one is used to send ctrl/status up to config thread */ 447 448 struct msm_stats_event_ctrl { 449 /* 0 - ctrl_cmd from control thread, 450 * 1 - stats/event kernel, 451 * 2 - V4L control or read request */ 452 int resptype; 453 int timeout_ms; 454 struct msm_ctrl_cmd ctrl_cmd; 455 /* struct vfe_event_t stats_event; */ 456 struct msm_cam_evt_msg stats_event; 457 }; 458 459 /* 2. config command: config command(from config thread); */ 460 struct msm_camera_cfg_cmd { 461 /* what to config: 462 * 1 - sensor config, 2 - vfe config */ 463 uint16_t cfg_type; 464 465 /* sensor config type */ 466 uint16_t cmd_type; 467 uint16_t queue; 468 uint16_t length; 469 void *value; 470 }; 471 472 #define CMD_GENERAL 0 473 #define CMD_AXI_CFG_OUT1 1 474 #define CMD_AXI_CFG_SNAP_O1_AND_O2 2 475 #define CMD_AXI_CFG_OUT2 3 476 #define CMD_PICT_T_AXI_CFG 4 477 #define CMD_PICT_M_AXI_CFG 5 478 #define CMD_RAW_PICT_AXI_CFG 6 479 480 #define CMD_FRAME_BUF_RELEASE 7 481 #define CMD_PREV_BUF_CFG 8 482 #define CMD_SNAP_BUF_RELEASE 9 483 #define CMD_SNAP_BUF_CFG 10 484 #define CMD_STATS_DISABLE 11 485 #define CMD_STATS_AEC_AWB_ENABLE 12 486 #define CMD_STATS_AF_ENABLE 13 487 #define CMD_STATS_AEC_ENABLE 14 488 #define CMD_STATS_AWB_ENABLE 15 489 #define CMD_STATS_ENABLE 16 490 491 #define CMD_STATS_AXI_CFG 17 492 #define CMD_STATS_AEC_AXI_CFG 18 493 #define CMD_STATS_AF_AXI_CFG 19 494 #define CMD_STATS_AWB_AXI_CFG 20 495 #define CMD_STATS_RS_AXI_CFG 21 496 #define CMD_STATS_CS_AXI_CFG 22 497 #define CMD_STATS_IHIST_AXI_CFG 23 498 #define CMD_STATS_SKIN_AXI_CFG 24 499 500 #define CMD_STATS_BUF_RELEASE 25 501 #define CMD_STATS_AEC_BUF_RELEASE 26 502 #define CMD_STATS_AF_BUF_RELEASE 27 503 #define CMD_STATS_AWB_BUF_RELEASE 28 504 #define CMD_STATS_RS_BUF_RELEASE 29 505 #define CMD_STATS_CS_BUF_RELEASE 30 506 #define CMD_STATS_IHIST_BUF_RELEASE 31 507 #define CMD_STATS_SKIN_BUF_RELEASE 32 508 509 #define UPDATE_STATS_INVALID 33 510 #define CMD_AXI_CFG_SNAP_GEMINI 34 511 #define CMD_AXI_CFG_SNAP 35 512 #define CMD_AXI_CFG_PREVIEW 36 513 #define CMD_AXI_CFG_VIDEO 37 514 515 #define CMD_STATS_IHIST_ENABLE 38 516 #define CMD_STATS_RS_ENABLE 39 517 #define CMD_STATS_CS_ENABLE 40 518 #define CMD_VPE 41 519 #define CMD_AXI_CFG_VPE 42 520 #define CMD_AXI_CFG_ZSL 43 521 #define CMD_AXI_CFG_SNAP_VPE 44 522 #define CMD_AXI_CFG_SNAP_THUMB_VPE 45 523 524 #define CMD_CONFIG_PING_ADDR 46 525 #define CMD_CONFIG_PONG_ADDR 47 526 #define CMD_CONFIG_FREE_BUF_ADDR 48 527 #define CMD_AXI_CFG_ZSL_ALL_CHNLS 49 528 #define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50 529 #define CMD_VFE_BUFFER_RELEASE 51 530 #define CMD_VFE_PROCESS_IRQ 52 531 #define CMD_STATS_BG_ENABLE 53 532 #define CMD_STATS_BF_ENABLE 54 533 #define CMD_STATS_BHIST_ENABLE 55 534 #define CMD_STATS_BG_BUF_RELEASE 56 535 #define CMD_STATS_BF_BUF_RELEASE 57 536 #define CMD_STATS_BHIST_BUF_RELEASE 58 537 #define CMD_VFE_PIX_SOF_COUNT_UPDATE 59 538 #define CMD_VFE_COUNT_PIX_SOF_ENABLE 60 539 #define CMD_STATS_BE_ENABLE 61 540 #define CMD_STATS_BE_BUF_RELEASE 62 541 542 #define CMD_AXI_CFG_PRIM BIT(8) 543 #define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9) 544 #define CMD_AXI_CFG_SEC BIT(10) 545 #define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11) 546 #define CMD_AXI_CFG_TERT1 BIT(12) 547 #define CMD_AXI_CFG_TERT2 BIT(13) 548 549 #define CMD_AXI_START 0xE1 550 #define CMD_AXI_STOP 0xE2 551 #define CMD_AXI_RESET 0xE3 552 #define CMD_AXI_ABORT 0xE4 553 554 555 556 #define AXI_CMD_PREVIEW BIT(0) 557 #define AXI_CMD_CAPTURE BIT(1) 558 #define AXI_CMD_RECORD BIT(2) 559 #define AXI_CMD_ZSL BIT(3) 560 #define AXI_CMD_RAW_CAPTURE BIT(4) 561 #define AXI_CMD_LIVESHOT BIT(5) 562 563 /* vfe config command: config command(from config thread)*/ 564 struct msm_vfe_cfg_cmd { 565 int cmd_type; 566 uint16_t length; 567 void *value; 568 }; 569 570 struct msm_vpe_cfg_cmd { 571 int cmd_type; 572 uint16_t length; 573 void *value; 574 }; 575 576 #define MAX_CAMERA_ENABLE_NAME_LEN 32 577 struct camera_enable_cmd { 578 char name[MAX_CAMERA_ENABLE_NAME_LEN]; 579 }; 580 581 #define MSM_PMEM_OUTPUT1 0 582 #define MSM_PMEM_OUTPUT2 1 583 #define MSM_PMEM_OUTPUT1_OUTPUT2 2 584 #define MSM_PMEM_THUMBNAIL 3 585 #define MSM_PMEM_MAINIMG 4 586 #define MSM_PMEM_RAW_MAINIMG 5 587 #define MSM_PMEM_AEC_AWB 6 588 #define MSM_PMEM_AF 7 589 #define MSM_PMEM_AEC 8 590 #define MSM_PMEM_AWB 9 591 #define MSM_PMEM_RS 10 592 #define MSM_PMEM_CS 11 593 #define MSM_PMEM_IHIST 12 594 #define MSM_PMEM_SKIN 13 595 #define MSM_PMEM_VIDEO 14 596 #define MSM_PMEM_PREVIEW 15 597 #define MSM_PMEM_VIDEO_VPE 16 598 #define MSM_PMEM_C2D 17 599 #define MSM_PMEM_MAINIMG_VPE 18 600 #define MSM_PMEM_THUMBNAIL_VPE 19 601 #define MSM_PMEM_BAYER_GRID 20 602 #define MSM_PMEM_BAYER_FOCUS 21 603 #define MSM_PMEM_BAYER_HIST 22 604 #define MSM_PMEM_BAYER_EXPOSURE 23 605 #define MSM_PMEM_MAX 24 606 607 #define STAT_AEAW 0 608 #define STAT_AEC 1 609 #define STAT_AF 2 610 #define STAT_AWB 3 611 #define STAT_RS 4 612 #define STAT_CS 5 613 #define STAT_IHIST 6 614 #define STAT_SKIN 7 615 #define STAT_BG 8 616 #define STAT_BF 9 617 #define STAT_BE 10 618 #define STAT_BHIST 11 619 #define STAT_MAX 12 620 621 #define FRAME_PREVIEW_OUTPUT1 0 622 #define FRAME_PREVIEW_OUTPUT2 1 623 #define FRAME_SNAPSHOT 2 624 #define FRAME_THUMBNAIL 3 625 #define FRAME_RAW_SNAPSHOT 4 626 #define FRAME_MAX 5 627 628 enum msm_stats_enum_type { 629 MSM_STATS_TYPE_AEC, /* legacy based AEC */ 630 MSM_STATS_TYPE_AF, /* legacy based AF */ 631 MSM_STATS_TYPE_AWB, /* legacy based AWB */ 632 MSM_STATS_TYPE_RS, /* legacy based RS */ 633 MSM_STATS_TYPE_CS, /* legacy based CS */ 634 MSM_STATS_TYPE_IHIST, /* legacy based HIST */ 635 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */ 636 MSM_STATS_TYPE_BG, /* Bayer Grids */ 637 MSM_STATS_TYPE_BF, /* Bayer Focus */ 638 MSM_STATS_TYPE_BE, /* Bayer Exposure*/ 639 MSM_STATS_TYPE_BHIST, /* Bayer Hist */ 640 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/ 641 MSM_STATS_TYPE_COMP, /* Composite stats */ 642 MSM_STATS_TYPE_MAX /* MAX */ 643 }; 644 645 struct msm_stats_buf_info { 646 int type; /* msm_stats_enum_type */ 647 int fd; 648 void *vaddr; 649 uint32_t offset; 650 uint32_t len; 651 uint32_t y_off; 652 uint32_t cbcr_off; 653 uint32_t planar0_off; 654 uint32_t planar1_off; 655 uint32_t planar2_off; 656 uint8_t active; 657 int buf_idx; 658 }; 659 660 struct msm_pmem_info { 661 int type; 662 int fd; 663 void *vaddr; 664 uint32_t offset; 665 uint32_t len; 666 uint32_t y_off; 667 uint32_t cbcr_off; 668 uint32_t planar0_off; 669 uint32_t planar1_off; 670 uint32_t planar2_off; 671 uint8_t active; 672 }; 673 674 struct outputCfg { 675 uint32_t height; 676 uint32_t width; 677 678 uint32_t window_height_firstline; 679 uint32_t window_height_lastline; 680 }; 681 682 #define VIDEO_NODE 0 683 #define MCTL_NODE 1 684 685 #define OUTPUT_1 0 686 #define OUTPUT_2 1 687 #define OUTPUT_1_AND_2 2 /* snapshot only */ 688 #define OUTPUT_1_AND_3 3 /* video */ 689 #define CAMIF_TO_AXI_VIA_OUTPUT_2 4 690 #define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5 691 #define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6 692 #define OUTPUT_1_2_AND_3 7 693 #define OUTPUT_ALL_CHNLS 8 694 #define OUTPUT_VIDEO_ALL_CHNLS 9 695 #define OUTPUT_ZSL_ALL_CHNLS 10 696 #define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS 697 698 #define OUTPUT_PRIM BIT(8) 699 #define OUTPUT_PRIM_ALL_CHNLS BIT(9) 700 #define OUTPUT_SEC BIT(10) 701 #define OUTPUT_SEC_ALL_CHNLS BIT(11) 702 #define OUTPUT_TERT1 BIT(12) 703 #define OUTPUT_TERT2 BIT(13) 704 705 706 707 #define MSM_FRAME_PREV_1 0 708 #define MSM_FRAME_PREV_2 1 709 #define MSM_FRAME_ENC 2 710 711 #define OUTPUT_TYPE_P BIT(0) 712 #define OUTPUT_TYPE_T BIT(1) 713 #define OUTPUT_TYPE_S BIT(2) 714 #define OUTPUT_TYPE_V BIT(3) 715 #define OUTPUT_TYPE_L BIT(4) 716 #define OUTPUT_TYPE_ST_L BIT(5) 717 #define OUTPUT_TYPE_ST_R BIT(6) 718 #define OUTPUT_TYPE_ST_D BIT(7) 719 #define OUTPUT_TYPE_R BIT(8) 720 #define OUTPUT_TYPE_R1 BIT(9) 721 #define OUTPUT_TYPE_SAEC BIT(10) 722 #define OUTPUT_TYPE_SAFC BIT(11) 723 #define OUTPUT_TYPE_SAWB BIT(12) 724 #define OUTPUT_TYPE_IHST BIT(13) 725 #define OUTPUT_TYPE_CSTA BIT(14) 726 727 struct fd_roi_info { 728 void *info; 729 int info_len; 730 }; 731 732 struct msm_mem_map_info { 733 uint32_t cookie; 734 uint32_t length; 735 uint32_t mem_type; 736 }; 737 738 #define MSM_MEM_MMAP 0 739 #define MSM_MEM_USERPTR 1 740 #define MSM_PLANE_MAX 8 741 #define MSM_PLANE_Y 0 742 #define MSM_PLANE_UV 1 743 744 struct msm_frame { 745 struct timespec ts; 746 int path; 747 int type; 748 unsigned long buffer; 749 uint32_t phy_offset; 750 uint32_t y_off; 751 uint32_t cbcr_off; 752 uint32_t planar0_off; 753 uint32_t planar1_off; 754 uint32_t planar2_off; 755 int fd; 756 757 void *cropinfo; 758 int croplen; 759 uint32_t error_code; 760 struct fd_roi_info roi_info; 761 uint32_t frame_id; 762 int stcam_quality_ind; 763 uint32_t stcam_conv_value; 764 765 struct ion_allocation_data ion_alloc; 766 struct ion_fd_data fd_data; 767 int ion_dev_fd; 768 }; 769 770 enum msm_st_frame_packing { 771 SIDE_BY_SIDE_HALF, 772 SIDE_BY_SIDE_FULL, 773 TOP_DOWN_HALF, 774 TOP_DOWN_FULL, 775 }; 776 777 struct msm_st_crop { 778 uint32_t in_w; 779 uint32_t in_h; 780 uint32_t out_w; 781 uint32_t out_h; 782 }; 783 784 struct msm_st_half { 785 uint32_t buf_p0_off; 786 uint32_t buf_p1_off; 787 uint32_t buf_p0_stride; 788 uint32_t buf_p1_stride; 789 uint32_t pix_x_off; 790 uint32_t pix_y_off; 791 struct msm_st_crop stCropInfo; 792 }; 793 794 struct msm_st_frame { 795 struct msm_frame buf_info; 796 int type; 797 enum msm_st_frame_packing packing; 798 struct msm_st_half L; 799 struct msm_st_half R; 800 int frame_id; 801 }; 802 803 #define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1) 804 805 struct stats_buff { 806 unsigned long buff; 807 int fd; 808 }; 809 810 struct msm_stats_buf { 811 uint8_t awb_ymin; 812 struct stats_buff aec; 813 struct stats_buff awb; 814 struct stats_buff af; 815 struct stats_buff be; 816 struct stats_buff ihist; 817 struct stats_buff rs; 818 struct stats_buff cs; 819 struct stats_buff skin; 820 int type; 821 uint32_t status_bits; 822 unsigned long buffer; 823 int fd; 824 int length; 825 struct ion_handle *handle; 826 uint32_t frame_id; 827 int buf_idx; 828 }; 829 #define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0 830 /* video capture mode in VIDIOC_S_PARM */ 831 #define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \ 832 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1) 833 /* extendedmode for video recording in VIDIOC_S_PARM */ 834 #define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \ 835 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2) 836 /* extendedmode for the full size main image in VIDIOC_S_PARM */ 837 #define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3) 838 /* extendedmode for the thumb nail image in VIDIOC_S_PARM */ 839 #define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \ 840 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4) 841 /* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */ 842 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \ 843 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5) 844 /* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */ 845 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \ 846 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6) 847 /* raw image type */ 848 #define MSM_V4L2_EXT_CAPTURE_MODE_RAW \ 849 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7) 850 /* RDI dump */ 851 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI \ 852 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8) 853 /* RDI dump 1 */ 854 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \ 855 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9) 856 /* RDI dump 2 */ 857 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \ 858 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10) 859 #define MSM_V4L2_EXT_CAPTURE_MODE_AEC \ 860 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11) 861 #define MSM_V4L2_EXT_CAPTURE_MODE_AWB \ 862 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12) 863 #define MSM_V4L2_EXT_CAPTURE_MODE_AF \ 864 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13) 865 #define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \ 866 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14) 867 #define MSM_V4L2_EXT_CAPTURE_MODE_CS \ 868 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15) 869 #define MSM_V4L2_EXT_CAPTURE_MODE_RS \ 870 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16) 871 #define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \ 872 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17) 873 #define MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT \ 874 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18) 875 #define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+19) 876 877 878 #define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE 879 #define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1) 880 #define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2) 881 #define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3) 882 #define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4) 883 #define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5) 884 #define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6) 885 #define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7) 886 #define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8) 887 #define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9) 888 #define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10) 889 #define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11) 890 #define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12) 891 #define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13) 892 #define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14) 893 #define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15) 894 #define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16) 895 #define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17) 896 #define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18) 897 #define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO 898 899 /* camera operation mode for video recording - two frame output queues */ 900 #define MSM_V4L2_CAM_OP_DEFAULT 0 901 /* camera operation mode for video recording - two frame output queues */ 902 #define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1) 903 /* camera operation mode for video recording - two frame output queues */ 904 #define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2) 905 /* camera operation mode for standard shapshot - two frame output queues */ 906 #define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3) 907 /* camera operation mode for zsl shapshot - three output queues */ 908 #define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4) 909 /* camera operation mode for raw snapshot - one frame output queue */ 910 #define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5) 911 /* camera operation mode for jpeg snapshot - one frame output queue */ 912 #define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6) 913 914 915 #define MSM_V4L2_VID_CAP_TYPE 0 916 #define MSM_V4L2_STREAM_ON 1 917 #define MSM_V4L2_STREAM_OFF 2 918 #define MSM_V4L2_SNAPSHOT 3 919 #define MSM_V4L2_QUERY_CTRL 4 920 #define MSM_V4L2_GET_CTRL 5 921 #define MSM_V4L2_SET_CTRL 6 922 #define MSM_V4L2_QUERY 7 923 #define MSM_V4L2_GET_CROP 8 924 #define MSM_V4L2_SET_CROP 9 925 #define MSM_V4L2_OPEN 10 926 #define MSM_V4L2_CLOSE 11 927 #define MSM_V4L2_SET_CTRL_CMD 12 928 #define MSM_V4L2_EVT_SUB_MASK 13 929 #define MSM_V4L2_PRIVATE_CMD 14 930 #define MSM_V4L2_MAX 15 931 #define V4L2_CAMERA_EXIT 43 932 933 struct crop_info { 934 void *info; 935 int len; 936 }; 937 938 struct msm_postproc { 939 int ftnum; 940 struct msm_frame fthumnail; 941 int fmnum; 942 struct msm_frame fmain; 943 }; 944 945 struct msm_snapshot_pp_status { 946 void *status; 947 }; 948 949 #define CFG_SET_MODE 0 950 #define CFG_SET_EFFECT 1 951 #define CFG_START 2 952 #define CFG_PWR_UP 3 953 #define CFG_PWR_DOWN 4 954 #define CFG_WRITE_EXPOSURE_GAIN 5 955 #define CFG_SET_DEFAULT_FOCUS 6 956 #define CFG_MOVE_FOCUS 7 957 #define CFG_REGISTER_TO_REAL_GAIN 8 958 #define CFG_REAL_TO_REGISTER_GAIN 9 959 #define CFG_SET_FPS 10 960 #define CFG_SET_PICT_FPS 11 961 #define CFG_SET_BRIGHTNESS 12 962 #define CFG_SET_CONTRAST 13 963 #define CFG_SET_ZOOM 14 964 #define CFG_SET_EXPOSURE_MODE 15 965 #define CFG_SET_WB 16 966 #define CFG_SET_ANTIBANDING 17 967 #define CFG_SET_EXP_GAIN 18 968 #define CFG_SET_PICT_EXP_GAIN 19 969 #define CFG_SET_LENS_SHADING 20 970 #define CFG_GET_PICT_FPS 21 971 #define CFG_GET_PREV_L_PF 22 972 #define CFG_GET_PREV_P_PL 23 973 #define CFG_GET_PICT_L_PF 24 974 #define CFG_GET_PICT_P_PL 25 975 #define CFG_GET_AF_MAX_STEPS 26 976 #define CFG_GET_PICT_MAX_EXP_LC 27 977 #define CFG_SEND_WB_INFO 28 978 #define CFG_SENSOR_INIT 29 979 #define CFG_GET_3D_CALI_DATA 30 980 #define CFG_GET_CALIB_DATA 31 981 #define CFG_GET_OUTPUT_INFO 32 982 #define CFG_GET_EEPROM_INFO 33 983 #define CFG_GET_EEPROM_DATA 34 984 #define CFG_SET_ACTUATOR_INFO 35 985 #define CFG_GET_ACTUATOR_INFO 36 986 /* TBD: QRD */ 987 #define CFG_SET_SATURATION 37 988 #define CFG_SET_SHARPNESS 38 989 #define CFG_SET_TOUCHAEC 39 990 #define CFG_SET_AUTO_FOCUS 40 991 #define CFG_SET_AUTOFLASH 41 992 #define CFG_SET_EXPOSURE_COMPENSATION 42 993 #define CFG_SET_ISO 43 994 #define CFG_START_STREAM 44 995 #define CFG_STOP_STREAM 45 996 #define CFG_GET_CSI_PARAMS 46 997 #define CFG_POWER_UP 47 998 #define CFG_POWER_DOWN 48 999 #define CFG_WRITE_I2C_ARRAY 49 1000 #define CFG_READ_I2C_ARRAY 50 1001 #define CFG_PCLK_CHANGE 51 1002 #define CFG_CONFIG_VREG_ARRAY 52 1003 #define CFG_CONFIG_CLK_ARRAY 53 1004 #define CFG_GPIO_OP 54 1005 #define CFG_MAX 55 1006 1007 1008 #define MOVE_NEAR 0 1009 #define MOVE_FAR 1 1010 1011 #define SENSOR_PREVIEW_MODE 0 1012 #define SENSOR_SNAPSHOT_MODE 1 1013 #define SENSOR_RAW_SNAPSHOT_MODE 2 1014 #define SENSOR_HFR_60FPS_MODE 3 1015 #define SENSOR_HFR_90FPS_MODE 4 1016 #define SENSOR_HFR_120FPS_MODE 5 1017 1018 #define SENSOR_QTR_SIZE 0 1019 #define SENSOR_FULL_SIZE 1 1020 #define SENSOR_QVGA_SIZE 2 1021 #define SENSOR_INVALID_SIZE 3 1022 1023 #define CAMERA_EFFECT_OFF 0 1024 #define CAMERA_EFFECT_MONO 1 1025 #define CAMERA_EFFECT_NEGATIVE 2 1026 #define CAMERA_EFFECT_SOLARIZE 3 1027 #define CAMERA_EFFECT_SEPIA 4 1028 #define CAMERA_EFFECT_POSTERIZE 5 1029 #define CAMERA_EFFECT_WHITEBOARD 6 1030 #define CAMERA_EFFECT_BLACKBOARD 7 1031 #define CAMERA_EFFECT_AQUA 8 1032 #define CAMERA_EFFECT_EMBOSS 9 1033 #define CAMERA_EFFECT_SKETCH 10 1034 #define CAMERA_EFFECT_NEON 11 1035 #define CAMERA_EFFECT_FADED 12 1036 #define CAMERA_EFFECT_VINTAGECOOL 13 1037 #define CAMERA_EFFECT_VINTAGEWARM 14 1038 #define CAMERA_EFFECT_ACCENT_BLUE 15 1039 #define CAMERA_EFFECT_ACCENT_GREEN 16 1040 #define CAMERA_EFFECT_ACCENT_ORANGE 17 1041 #define CAMERA_EFFECT_MAX 18 1042 1043 /* QRD */ 1044 #define CAMERA_EFFECT_BW 10 1045 #define CAMERA_EFFECT_BLUISH 12 1046 #define CAMERA_EFFECT_REDDISH 13 1047 #define CAMERA_EFFECT_GREENISH 14 1048 1049 /* QRD */ 1050 #define CAMERA_ANTIBANDING_OFF 0 1051 #define CAMERA_ANTIBANDING_50HZ 2 1052 #define CAMERA_ANTIBANDING_60HZ 1 1053 #define CAMERA_ANTIBANDING_AUTO 3 1054 1055 #define CAMERA_CONTRAST_LV0 0 1056 #define CAMERA_CONTRAST_LV1 1 1057 #define CAMERA_CONTRAST_LV2 2 1058 #define CAMERA_CONTRAST_LV3 3 1059 #define CAMERA_CONTRAST_LV4 4 1060 #define CAMERA_CONTRAST_LV5 5 1061 #define CAMERA_CONTRAST_LV6 6 1062 #define CAMERA_CONTRAST_LV7 7 1063 #define CAMERA_CONTRAST_LV8 8 1064 #define CAMERA_CONTRAST_LV9 9 1065 1066 #define CAMERA_BRIGHTNESS_LV0 0 1067 #define CAMERA_BRIGHTNESS_LV1 1 1068 #define CAMERA_BRIGHTNESS_LV2 2 1069 #define CAMERA_BRIGHTNESS_LV3 3 1070 #define CAMERA_BRIGHTNESS_LV4 4 1071 #define CAMERA_BRIGHTNESS_LV5 5 1072 #define CAMERA_BRIGHTNESS_LV6 6 1073 #define CAMERA_BRIGHTNESS_LV7 7 1074 #define CAMERA_BRIGHTNESS_LV8 8 1075 1076 1077 #define CAMERA_SATURATION_LV0 0 1078 #define CAMERA_SATURATION_LV1 1 1079 #define CAMERA_SATURATION_LV2 2 1080 #define CAMERA_SATURATION_LV3 3 1081 #define CAMERA_SATURATION_LV4 4 1082 #define CAMERA_SATURATION_LV5 5 1083 #define CAMERA_SATURATION_LV6 6 1084 #define CAMERA_SATURATION_LV7 7 1085 #define CAMERA_SATURATION_LV8 8 1086 1087 #define CAMERA_SHARPNESS_LV0 0 1088 #define CAMERA_SHARPNESS_LV1 3 1089 #define CAMERA_SHARPNESS_LV2 6 1090 #define CAMERA_SHARPNESS_LV3 9 1091 #define CAMERA_SHARPNESS_LV4 12 1092 #define CAMERA_SHARPNESS_LV5 15 1093 #define CAMERA_SHARPNESS_LV6 18 1094 #define CAMERA_SHARPNESS_LV7 21 1095 #define CAMERA_SHARPNESS_LV8 24 1096 #define CAMERA_SHARPNESS_LV9 27 1097 #define CAMERA_SHARPNESS_LV10 30 1098 1099 #define CAMERA_SETAE_AVERAGE 0 1100 #define CAMERA_SETAE_CENWEIGHT 1 1101 1102 #define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */ 1103 #define CAMERA_WB_CUSTOM 2 1104 #define CAMERA_WB_INCANDESCENT 3 1105 #define CAMERA_WB_FLUORESCENT 4 1106 #define CAMERA_WB_DAYLIGHT 5 1107 #define CAMERA_WB_CLOUDY_DAYLIGHT 6 1108 #define CAMERA_WB_TWILIGHT 7 1109 #define CAMERA_WB_SHADE 8 1110 1111 #define CAMERA_EXPOSURE_COMPENSATION_LV0 12 1112 #define CAMERA_EXPOSURE_COMPENSATION_LV1 6 1113 #define CAMERA_EXPOSURE_COMPENSATION_LV2 0 1114 #define CAMERA_EXPOSURE_COMPENSATION_LV3 -6 1115 #define CAMERA_EXPOSURE_COMPENSATION_LV4 -12 1116 1117 enum msm_v4l2_saturation_level { 1118 MSM_V4L2_SATURATION_L0, 1119 MSM_V4L2_SATURATION_L1, 1120 MSM_V4L2_SATURATION_L2, 1121 MSM_V4L2_SATURATION_L3, 1122 MSM_V4L2_SATURATION_L4, 1123 MSM_V4L2_SATURATION_L5, 1124 MSM_V4L2_SATURATION_L6, 1125 MSM_V4L2_SATURATION_L7, 1126 MSM_V4L2_SATURATION_L8, 1127 MSM_V4L2_SATURATION_L9, 1128 MSM_V4L2_SATURATION_L10, 1129 }; 1130 1131 enum msm_v4l2_contrast_level { 1132 MSM_V4L2_CONTRAST_L0, 1133 MSM_V4L2_CONTRAST_L1, 1134 MSM_V4L2_CONTRAST_L2, 1135 MSM_V4L2_CONTRAST_L3, 1136 MSM_V4L2_CONTRAST_L4, 1137 MSM_V4L2_CONTRAST_L5, 1138 MSM_V4L2_CONTRAST_L6, 1139 MSM_V4L2_CONTRAST_L7, 1140 MSM_V4L2_CONTRAST_L8, 1141 MSM_V4L2_CONTRAST_L9, 1142 MSM_V4L2_CONTRAST_L10, 1143 }; 1144 1145 1146 enum msm_v4l2_exposure_level { 1147 MSM_V4L2_EXPOSURE_N2, 1148 MSM_V4L2_EXPOSURE_N1, 1149 MSM_V4L2_EXPOSURE_D, 1150 MSM_V4L2_EXPOSURE_P1, 1151 MSM_V4L2_EXPOSURE_P2, 1152 }; 1153 1154 enum msm_v4l2_sharpness_level { 1155 MSM_V4L2_SHARPNESS_L0, 1156 MSM_V4L2_SHARPNESS_L1, 1157 MSM_V4L2_SHARPNESS_L2, 1158 MSM_V4L2_SHARPNESS_L3, 1159 MSM_V4L2_SHARPNESS_L4, 1160 MSM_V4L2_SHARPNESS_L5, 1161 MSM_V4L2_SHARPNESS_L6, 1162 }; 1163 1164 enum msm_v4l2_expo_metering_mode { 1165 MSM_V4L2_EXP_FRAME_AVERAGE, 1166 MSM_V4L2_EXP_CENTER_WEIGHTED, 1167 MSM_V4L2_EXP_SPOT_METERING, 1168 }; 1169 1170 enum msm_v4l2_iso_mode { 1171 MSM_V4L2_ISO_AUTO = 0, 1172 MSM_V4L2_ISO_DEBLUR, 1173 MSM_V4L2_ISO_100, 1174 MSM_V4L2_ISO_200, 1175 MSM_V4L2_ISO_400, 1176 MSM_V4L2_ISO_800, 1177 MSM_V4L2_ISO_1600, 1178 }; 1179 1180 enum msm_v4l2_wb_mode { 1181 MSM_V4L2_WB_OFF, 1182 MSM_V4L2_WB_AUTO , 1183 MSM_V4L2_WB_CUSTOM, 1184 MSM_V4L2_WB_INCANDESCENT, 1185 MSM_V4L2_WB_FLUORESCENT, 1186 MSM_V4L2_WB_DAYLIGHT, 1187 MSM_V4L2_WB_CLOUDY_DAYLIGHT, 1188 }; 1189 1190 enum msm_v4l2_special_effect { 1191 MSM_V4L2_EFFECT_OFF, 1192 MSM_V4L2_EFFECT_MONO, 1193 MSM_V4L2_EFFECT_NEGATIVE, 1194 MSM_V4L2_EFFECT_SOLARIZE, 1195 MSM_V4L2_EFFECT_SEPIA, 1196 MSM_V4L2_EFFECT_POSTERAIZE, 1197 MSM_V4L2_EFFECT_WHITEBOARD, 1198 MSM_V4L2_EFFECT_BLACKBOARD, 1199 MSM_V4L2_EFFECT_AQUA, 1200 MSM_V4L2_EFFECT_EMBOSS, 1201 MSM_V4L2_EFFECT_SKETCH, 1202 MSM_V4L2_EFFECT_NEON, 1203 MSM_V4L2_EFFECT_MAX, 1204 }; 1205 1206 enum msm_v4l2_power_line_frequency { 1207 MSM_V4L2_POWER_LINE_OFF, 1208 MSM_V4L2_POWER_LINE_60HZ, 1209 MSM_V4L2_POWER_LINE_50HZ, 1210 MSM_V4L2_POWER_LINE_AUTO, 1211 }; 1212 1213 #define CAMERA_ISO_TYPE_AUTO 0 1214 #define CAMEAR_ISO_TYPE_HJR 1 1215 #define CAMEAR_ISO_TYPE_100 2 1216 #define CAMERA_ISO_TYPE_200 3 1217 #define CAMERA_ISO_TYPE_400 4 1218 #define CAMEAR_ISO_TYPE_800 5 1219 #define CAMERA_ISO_TYPE_1600 6 1220 1221 struct sensor_pict_fps { 1222 uint16_t prevfps; 1223 uint16_t pictfps; 1224 }; 1225 1226 struct exp_gain_cfg { 1227 uint16_t gain; 1228 uint32_t line; 1229 }; 1230 1231 struct focus_cfg { 1232 int32_t steps; 1233 int dir; 1234 }; 1235 1236 struct fps_cfg { 1237 uint16_t f_mult; 1238 uint16_t fps_div; 1239 uint32_t pict_fps_div; 1240 }; 1241 struct wb_info_cfg { 1242 uint16_t red_gain; 1243 uint16_t green_gain; 1244 uint16_t blue_gain; 1245 }; 1246 struct sensor_3d_exp_cfg { 1247 uint16_t gain; 1248 uint32_t line; 1249 uint16_t r_gain; 1250 uint16_t b_gain; 1251 uint16_t gr_gain; 1252 uint16_t gb_gain; 1253 uint16_t gain_adjust; 1254 }; 1255 struct sensor_3d_cali_data_t{ 1256 unsigned char left_p_matrix[3][4][8]; 1257 unsigned char right_p_matrix[3][4][8]; 1258 unsigned char square_len[8]; 1259 unsigned char focal_len[8]; 1260 unsigned char pixel_pitch[8]; 1261 uint16_t left_r; 1262 uint16_t left_b; 1263 uint16_t left_gb; 1264 uint16_t left_af_far; 1265 uint16_t left_af_mid; 1266 uint16_t left_af_short; 1267 uint16_t left_af_5um; 1268 uint16_t left_af_50up; 1269 uint16_t left_af_50down; 1270 uint16_t right_r; 1271 uint16_t right_b; 1272 uint16_t right_gb; 1273 uint16_t right_af_far; 1274 uint16_t right_af_mid; 1275 uint16_t right_af_short; 1276 uint16_t right_af_5um; 1277 uint16_t right_af_50up; 1278 uint16_t right_af_50down; 1279 }; 1280 struct sensor_init_cfg { 1281 uint8_t prev_res; 1282 uint8_t pict_res; 1283 }; 1284 1285 struct sensor_calib_data { 1286 /* Color Related Measurements */ 1287 uint16_t r_over_g; 1288 uint16_t b_over_g; 1289 uint16_t gr_over_gb; 1290 1291 /* Lens Related Measurements */ 1292 uint16_t macro_2_inf; 1293 uint16_t inf_2_macro; 1294 uint16_t stroke_amt; 1295 uint16_t af_pos_1m; 1296 uint16_t af_pos_inf; 1297 }; 1298 1299 enum msm_sensor_resolution_t { 1300 MSM_SENSOR_RES_FULL, 1301 MSM_SENSOR_RES_QTR, 1302 MSM_SENSOR_RES_2, 1303 MSM_SENSOR_RES_3, 1304 MSM_SENSOR_RES_4, 1305 MSM_SENSOR_RES_5, 1306 MSM_SENSOR_RES_6, 1307 MSM_SENSOR_RES_7, 1308 MSM_SENSOR_INVALID_RES, 1309 }; 1310 1311 struct msm_sensor_output_info_t { 1312 uint16_t x_output; 1313 uint16_t y_output; 1314 uint16_t line_length_pclk; 1315 uint16_t frame_length_lines; 1316 uint32_t vt_pixel_clk; 1317 uint32_t op_pixel_clk; 1318 uint16_t binning_factor; 1319 }; 1320 1321 struct sensor_output_info_t { 1322 struct msm_sensor_output_info_t *output_info; 1323 uint16_t num_info; 1324 }; 1325 1326 struct msm_sensor_exp_gain_info_t { 1327 uint16_t coarse_int_time_addr; 1328 uint16_t global_gain_addr; 1329 uint16_t vert_offset; 1330 }; 1331 1332 struct msm_sensor_output_reg_addr_t { 1333 uint16_t x_output; 1334 uint16_t y_output; 1335 uint16_t line_length_pclk; 1336 uint16_t frame_length_lines; 1337 }; 1338 1339 struct sensor_driver_params_type { 1340 struct msm_camera_i2c_reg_setting *init_settings; 1341 uint16_t init_settings_size; 1342 struct msm_camera_i2c_reg_setting *mode_settings; 1343 uint16_t mode_settings_size; 1344 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr; 1345 struct msm_camera_i2c_reg_setting *start_settings; 1346 struct msm_camera_i2c_reg_setting *stop_settings; 1347 struct msm_camera_i2c_reg_setting *groupon_settings; 1348 struct msm_camera_i2c_reg_setting *groupoff_settings; 1349 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info; 1350 struct msm_sensor_output_info_t *output_info; 1351 }; 1352 1353 struct mirror_flip { 1354 int32_t x_mirror; 1355 int32_t y_flip; 1356 }; 1357 1358 struct cord { 1359 uint32_t x; 1360 uint32_t y; 1361 }; 1362 1363 struct msm_eeprom_data_t { 1364 void *eeprom_data; 1365 uint16_t index; 1366 }; 1367 1368 struct msm_camera_csid_vc_cfg { 1369 uint8_t cid; 1370 uint8_t dt; 1371 uint8_t decode_format; 1372 }; 1373 1374 struct csi_lane_params_t { 1375 uint16_t csi_lane_assign; 1376 uint8_t csi_lane_mask; 1377 uint8_t csi_if; 1378 uint8_t csid_core[2]; 1379 uint8_t csi_phy_sel; 1380 }; 1381 1382 struct msm_camera_csid_lut_params { 1383 uint8_t num_cid; 1384 struct msm_camera_csid_vc_cfg *vc_cfg; 1385 }; 1386 1387 struct msm_camera_csid_params { 1388 uint8_t lane_cnt; 1389 uint16_t lane_assign; 1390 uint8_t phy_sel; 1391 struct msm_camera_csid_lut_params lut_params; 1392 }; 1393 1394 struct msm_camera_csiphy_params { 1395 uint8_t lane_cnt; 1396 uint8_t settle_cnt; 1397 uint16_t lane_mask; 1398 uint8_t combo_mode; 1399 uint8_t csid_core; 1400 }; 1401 1402 struct msm_camera_csi2_params { 1403 struct msm_camera_csid_params csid_params; 1404 struct msm_camera_csiphy_params csiphy_params; 1405 }; 1406 1407 enum msm_camera_csi_data_format { 1408 CSI_8BIT, 1409 CSI_10BIT, 1410 CSI_12BIT, 1411 }; 1412 1413 struct msm_camera_csi_params { 1414 enum msm_camera_csi_data_format data_format; 1415 uint8_t lane_cnt; 1416 uint8_t lane_assign; 1417 uint8_t settle_cnt; 1418 uint8_t dpcm_scheme; 1419 }; 1420 1421 enum csic_cfg_type_t { 1422 CSIC_INIT, 1423 CSIC_CFG, 1424 }; 1425 1426 struct csic_cfg_data { 1427 enum csic_cfg_type_t cfgtype; 1428 struct msm_camera_csi_params *csic_params; 1429 }; 1430 1431 enum csid_cfg_type_t { 1432 CSID_INIT, 1433 CSID_CFG, 1434 }; 1435 1436 struct csid_cfg_data { 1437 enum csid_cfg_type_t cfgtype; 1438 union { 1439 uint32_t csid_version; 1440 struct msm_camera_csid_params *csid_params; 1441 } cfg; 1442 }; 1443 1444 enum csiphy_cfg_type_t { 1445 CSIPHY_INIT, 1446 CSIPHY_CFG, 1447 }; 1448 1449 struct csiphy_cfg_data { 1450 enum csiphy_cfg_type_t cfgtype; 1451 struct msm_camera_csiphy_params *csiphy_params; 1452 }; 1453 1454 #define CSI_EMBED_DATA 0x12 1455 #define CSI_RESERVED_DATA_0 0x13 1456 #define CSI_YUV422_8 0x1E 1457 #define CSI_RAW8 0x2A 1458 #define CSI_RAW10 0x2B 1459 #define CSI_RAW12 0x2C 1460 1461 #define CSI_DECODE_6BIT 0 1462 #define CSI_DECODE_8BIT 1 1463 #define CSI_DECODE_10BIT 2 1464 #define CSI_DECODE_DPCM_10_8_10 5 1465 1466 #define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\ 1467 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT)) 1468 #define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0) 1469 #define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1) 1470 #define ISPIF_OFF_IMMEDIATELY (0x01 << 2) 1471 #define ISPIF_S_STREAM_SHIFT 4 1472 #define ISPIF_VFE_INTF_SHIFT 12 1473 1474 #define PIX_0 (0x01 << 0) 1475 #define RDI_0 (0x01 << 1) 1476 #define PIX_1 (0x01 << 2) 1477 #define RDI_1 (0x01 << 3) 1478 #define RDI_2 (0x01 << 4) 1479 1480 enum msm_ispif_vfe_intf { 1481 VFE0, 1482 VFE1, 1483 VFE_MAX, 1484 }; 1485 1486 enum msm_ispif_intftype { 1487 PIX0, 1488 RDI0, 1489 PIX1, 1490 RDI1, 1491 RDI2, 1492 INTF_MAX, 1493 }; 1494 1495 enum msm_ispif_vc { 1496 VC0, 1497 VC1, 1498 VC2, 1499 VC3, 1500 }; 1501 1502 enum msm_ispif_cid { 1503 CID0, 1504 CID1, 1505 CID2, 1506 CID3, 1507 CID4, 1508 CID5, 1509 CID6, 1510 CID7, 1511 CID8, 1512 CID9, 1513 CID10, 1514 CID11, 1515 CID12, 1516 CID13, 1517 CID14, 1518 CID15, 1519 }; 1520 1521 struct msm_ispif_params { 1522 uint8_t intftype; 1523 uint16_t cid_mask; 1524 uint8_t csid; 1525 uint8_t vfe_intf; 1526 }; 1527 1528 struct msm_ispif_params_list { 1529 uint32_t len; 1530 struct msm_ispif_params params[4]; 1531 }; 1532 1533 enum ispif_cfg_type_t { 1534 ISPIF_INIT, 1535 ISPIF_SET_CFG, 1536 ISPIF_SET_ON_FRAME_BOUNDARY, 1537 ISPIF_SET_OFF_FRAME_BOUNDARY, 1538 ISPIF_SET_OFF_IMMEDIATELY, 1539 ISPIF_RELEASE, 1540 }; 1541 1542 struct ispif_cfg_data { 1543 enum ispif_cfg_type_t cfgtype; 1544 union { 1545 uint32_t csid_version; 1546 int cmd; 1547 struct msm_ispif_params_list ispif_params; 1548 } cfg; 1549 }; 1550 1551 enum msm_camera_i2c_reg_addr_type { 1552 MSM_CAMERA_I2C_BYTE_ADDR = 1, 1553 MSM_CAMERA_I2C_WORD_ADDR, 1554 MSM_CAMERA_I2C_3B_ADDR, 1555 }; 1556 1557 struct msm_camera_i2c_reg_array { 1558 uint16_t reg_addr; 1559 uint16_t reg_data; 1560 }; 1561 1562 enum msm_camera_i2c_data_type { 1563 MSM_CAMERA_I2C_BYTE_DATA = 1, 1564 MSM_CAMERA_I2C_WORD_DATA, 1565 MSM_CAMERA_I2C_SET_BYTE_MASK, 1566 MSM_CAMERA_I2C_UNSET_BYTE_MASK, 1567 MSM_CAMERA_I2C_SET_WORD_MASK, 1568 MSM_CAMERA_I2C_UNSET_WORD_MASK, 1569 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA, 1570 }; 1571 1572 struct msm_camera_i2c_reg_setting { 1573 struct msm_camera_i2c_reg_array *reg_setting; 1574 uint16_t size; 1575 enum msm_camera_i2c_reg_addr_type addr_type; 1576 enum msm_camera_i2c_data_type data_type; 1577 uint16_t delay; 1578 }; 1579 1580 enum oem_setting_type { 1581 I2C_READ = 1, 1582 I2C_WRITE, 1583 GPIO_OP, 1584 EEPROM_READ, 1585 VREG_SET, 1586 CLK_SET, 1587 }; 1588 1589 struct sensor_oem_setting { 1590 enum oem_setting_type type; 1591 void *data; 1592 }; 1593 1594 enum camera_vreg_type { 1595 REG_LDO, 1596 REG_VS, 1597 REG_GPIO, 1598 }; 1599 1600 enum msm_camera_vreg_name_t { 1601 CAM_VDIG, 1602 CAM_VIO, 1603 CAM_VANA, 1604 CAM_VAF, 1605 CAM_VREG_MAX, 1606 }; 1607 1608 struct msm_camera_csi_lane_params { 1609 uint16_t csi_lane_assign; 1610 uint16_t csi_lane_mask; 1611 }; 1612 1613 struct camera_vreg_t { 1614 const char *reg_name; 1615 enum camera_vreg_type type; 1616 int min_voltage; 1617 int max_voltage; 1618 int op_mode; 1619 uint32_t delay; 1620 }; 1621 1622 struct msm_camera_vreg_setting { 1623 struct camera_vreg_t *cam_vreg; 1624 uint16_t num_vreg; 1625 uint8_t enable; 1626 }; 1627 1628 struct msm_cam_clk_info { 1629 const char *clk_name; 1630 long clk_rate; 1631 uint32_t delay; 1632 }; 1633 1634 struct msm_cam_clk_setting { 1635 struct msm_cam_clk_info *clk_info; 1636 uint16_t num_clk_info; 1637 uint8_t enable; 1638 }; 1639 1640 struct sensor_cfg_data { 1641 int cfgtype; 1642 int mode; 1643 int rs; 1644 uint8_t max_steps; 1645 1646 union { 1647 int8_t effect; 1648 uint8_t lens_shading; 1649 uint16_t prevl_pf; 1650 uint16_t prevp_pl; 1651 uint16_t pictl_pf; 1652 uint16_t pictp_pl; 1653 uint32_t pict_max_exp_lc; 1654 uint16_t p_fps; 1655 uint8_t iso_type; 1656 struct sensor_init_cfg init_info; 1657 struct sensor_pict_fps gfps; 1658 struct exp_gain_cfg exp_gain; 1659 struct focus_cfg focus; 1660 struct fps_cfg fps; 1661 struct wb_info_cfg wb_info; 1662 struct sensor_3d_exp_cfg sensor_3d_exp; 1663 struct sensor_calib_data calib_info; 1664 struct sensor_output_info_t output_info; 1665 struct msm_eeprom_data_t eeprom_data; 1666 struct csi_lane_params_t csi_lane_params; 1667 /* QRD */ 1668 uint16_t antibanding; 1669 uint8_t contrast; 1670 uint8_t saturation; 1671 uint8_t sharpness; 1672 int8_t brightness; 1673 int ae_mode; 1674 uint8_t wb_val; 1675 int8_t exp_compensation; 1676 uint32_t pclk; 1677 struct cord aec_cord; 1678 int is_autoflash; 1679 struct mirror_flip mirror_flip; 1680 void *setting; 1681 } cfg; 1682 }; 1683 1684 enum gpio_operation_type { 1685 GPIO_REQUEST, 1686 GPIO_FREE, 1687 GPIO_SET_DIRECTION_OUTPUT, 1688 GPIO_SET_DIRECTION_INPUT, 1689 GPIO_GET_VALUE, 1690 GPIO_SET_VALUE, 1691 }; 1692 1693 struct msm_cam_gpio_operation { 1694 enum gpio_operation_type op_type; 1695 unsigned address; 1696 int value; 1697 const char *tag; 1698 }; 1699 1700 struct damping_params_t { 1701 uint32_t damping_step; 1702 uint32_t damping_delay; 1703 uint32_t hw_params; 1704 }; 1705 1706 enum actuator_type { 1707 ACTUATOR_VCM, 1708 ACTUATOR_PIEZO, 1709 }; 1710 1711 enum msm_actuator_data_type { 1712 MSM_ACTUATOR_BYTE_DATA = 1, 1713 MSM_ACTUATOR_WORD_DATA, 1714 }; 1715 1716 enum msm_actuator_addr_type { 1717 MSM_ACTUATOR_BYTE_ADDR = 1, 1718 MSM_ACTUATOR_WORD_ADDR, 1719 }; 1720 1721 enum msm_actuator_write_type { 1722 MSM_ACTUATOR_WRITE_HW_DAMP, 1723 MSM_ACTUATOR_WRITE_DAC, 1724 }; 1725 1726 struct msm_actuator_reg_params_t { 1727 enum msm_actuator_write_type reg_write_type; 1728 uint32_t hw_mask; 1729 uint16_t reg_addr; 1730 uint16_t hw_shift; 1731 uint16_t data_shift; 1732 }; 1733 1734 struct reg_settings_t { 1735 uint16_t reg_addr; 1736 uint16_t reg_data; 1737 }; 1738 1739 struct region_params_t { 1740 /* [0] = ForwardDirection Macro boundary 1741 [1] = ReverseDirection Inf boundary 1742 */ 1743 uint16_t step_bound[2]; 1744 uint16_t code_per_step; 1745 }; 1746 1747 struct msm_actuator_move_params_t { 1748 int8_t dir; 1749 int8_t sign_dir; 1750 int16_t dest_step_pos; 1751 int32_t num_steps; 1752 struct damping_params_t *ringing_params; 1753 }; 1754 1755 struct msm_actuator_tuning_params_t { 1756 int16_t initial_code; 1757 uint16_t pwd_step; 1758 uint16_t region_size; 1759 uint32_t total_steps; 1760 struct region_params_t *region_params; 1761 }; 1762 1763 struct msm_actuator_params_t { 1764 enum actuator_type act_type; 1765 uint8_t reg_tbl_size; 1766 uint16_t data_size; 1767 uint16_t init_setting_size; 1768 uint32_t i2c_addr; 1769 enum msm_actuator_addr_type i2c_addr_type; 1770 enum msm_actuator_data_type i2c_data_type; 1771 struct msm_actuator_reg_params_t *reg_tbl_params; 1772 struct reg_settings_t *init_settings; 1773 }; 1774 1775 struct msm_actuator_set_info_t { 1776 struct msm_actuator_params_t actuator_params; 1777 struct msm_actuator_tuning_params_t af_tuning_params; 1778 }; 1779 1780 struct msm_actuator_get_info_t { 1781 uint32_t focal_length_num; 1782 uint32_t focal_length_den; 1783 uint32_t f_number_num; 1784 uint32_t f_number_den; 1785 uint32_t f_pix_num; 1786 uint32_t f_pix_den; 1787 uint32_t total_f_dist_num; 1788 uint32_t total_f_dist_den; 1789 uint32_t hor_view_angle_num; 1790 uint32_t hor_view_angle_den; 1791 uint32_t ver_view_angle_num; 1792 uint32_t ver_view_angle_den; 1793 }; 1794 1795 enum af_camera_name { 1796 ACTUATOR_MAIN_CAM_0, 1797 ACTUATOR_MAIN_CAM_1, 1798 ACTUATOR_MAIN_CAM_2, 1799 ACTUATOR_MAIN_CAM_3, 1800 ACTUATOR_MAIN_CAM_4, 1801 ACTUATOR_MAIN_CAM_5, 1802 ACTUATOR_WEB_CAM_0, 1803 ACTUATOR_WEB_CAM_1, 1804 ACTUATOR_WEB_CAM_2, 1805 }; 1806 1807 struct msm_actuator_cfg_data { 1808 int cfgtype; 1809 uint8_t is_af_supported; 1810 union { 1811 struct msm_actuator_move_params_t move; 1812 struct msm_actuator_set_info_t set_info; 1813 struct msm_actuator_get_info_t get_info; 1814 enum af_camera_name cam_name; 1815 } cfg; 1816 }; 1817 1818 struct msm_eeprom_support { 1819 uint16_t is_supported; 1820 uint16_t size; 1821 uint16_t index; 1822 uint16_t qvalue; 1823 }; 1824 1825 struct msm_calib_wb { 1826 uint16_t r_over_g; 1827 uint16_t b_over_g; 1828 uint16_t gr_over_gb; 1829 }; 1830 1831 struct msm_calib_af { 1832 uint16_t macro_dac; 1833 uint16_t inf_dac; 1834 uint16_t start_dac; 1835 }; 1836 1837 struct msm_calib_lsc { 1838 uint16_t r_gain[221]; 1839 uint16_t b_gain[221]; 1840 uint16_t gr_gain[221]; 1841 uint16_t gb_gain[221]; 1842 }; 1843 1844 struct pixel_t { 1845 int x; 1846 int y; 1847 }; 1848 1849 struct msm_calib_dpc { 1850 uint16_t validcount; 1851 struct pixel_t snapshot_coord[128]; 1852 struct pixel_t preview_coord[128]; 1853 struct pixel_t video_coord[128]; 1854 }; 1855 1856 struct msm_calib_raw { 1857 uint8_t *data; 1858 uint32_t size; 1859 }; 1860 1861 struct msm_camera_eeprom_info_t { 1862 struct msm_eeprom_support af; 1863 struct msm_eeprom_support wb; 1864 struct msm_eeprom_support lsc; 1865 struct msm_eeprom_support dpc; 1866 struct msm_eeprom_support raw; 1867 }; 1868 1869 struct msm_eeprom_cfg_data { 1870 int cfgtype; 1871 uint8_t is_eeprom_supported; 1872 union { 1873 struct msm_eeprom_data_t get_data; 1874 struct msm_camera_eeprom_info_t get_info; 1875 } cfg; 1876 }; 1877 1878 struct sensor_large_data { 1879 int cfgtype; 1880 union { 1881 struct sensor_3d_cali_data_t sensor_3d_cali_data; 1882 } data; 1883 }; 1884 1885 enum sensor_type_t { 1886 BAYER, 1887 YUV, 1888 JPEG_SOC, 1889 }; 1890 1891 enum flash_type { 1892 LED_FLASH, 1893 STROBE_FLASH, 1894 }; 1895 1896 enum strobe_flash_ctrl_type { 1897 STROBE_FLASH_CTRL_INIT, 1898 STROBE_FLASH_CTRL_CHARGE, 1899 STROBE_FLASH_CTRL_RELEASE 1900 }; 1901 1902 struct strobe_flash_ctrl_data { 1903 enum strobe_flash_ctrl_type type; 1904 int charge_en; 1905 }; 1906 1907 struct msm_camera_info { 1908 int num_cameras; 1909 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS]; 1910 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS]; 1911 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS]; 1912 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS]; 1913 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS]; 1914 }; 1915 1916 struct msm_cam_config_dev_info { 1917 int num_config_nodes; 1918 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS]; 1919 int config_dev_id[MSM_MAX_CAMERA_CONFIGS]; 1920 }; 1921 1922 struct msm_mctl_node_info { 1923 int num_mctl_nodes; 1924 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS]; 1925 }; 1926 1927 struct flash_ctrl_data { 1928 int flashtype; 1929 union { 1930 int led_state; 1931 struct strobe_flash_ctrl_data strobe_ctrl; 1932 } ctrl_data; 1933 }; 1934 1935 #define GET_NAME 0 1936 #define GET_PREVIEW_LINE_PER_FRAME 1 1937 #define GET_PREVIEW_PIXELS_PER_LINE 2 1938 #define GET_SNAPSHOT_LINE_PER_FRAME 3 1939 #define GET_SNAPSHOT_PIXELS_PER_LINE 4 1940 #define GET_SNAPSHOT_FPS 5 1941 #define GET_SNAPSHOT_MAX_EP_LINE_CNT 6 1942 1943 struct msm_camsensor_info { 1944 char name[MAX_SENSOR_NAME]; 1945 uint8_t flash_enabled; 1946 uint8_t strobe_flash_enabled; 1947 uint8_t actuator_enabled; 1948 uint8_t ispif_supported; 1949 int8_t total_steps; 1950 uint8_t support_3d; 1951 enum flash_type flashtype; 1952 enum sensor_type_t sensor_type; 1953 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */ 1954 uint32_t camera_type; /* msm_camera_type */ 1955 int mount_angle; 1956 uint32_t max_width; 1957 uint32_t max_height; 1958 }; 1959 1960 #define V4L2_SINGLE_PLANE 0 1961 #define V4L2_MULTI_PLANE_Y 0 1962 #define V4L2_MULTI_PLANE_CBCR 1 1963 #define V4L2_MULTI_PLANE_CB 1 1964 #define V4L2_MULTI_PLANE_CR 2 1965 1966 struct plane_data { 1967 int plane_id; 1968 uint32_t offset; 1969 unsigned long size; 1970 }; 1971 1972 struct img_plane_info { 1973 uint32_t width; 1974 uint32_t height; 1975 uint32_t pixelformat; 1976 uint8_t buffer_type; /*Single/Multi planar*/ 1977 uint8_t output_port; 1978 uint32_t ext_mode; 1979 uint8_t num_planes; 1980 struct plane_data plane[MAX_PLANES]; 1981 uint32_t sp_y_offset; 1982 uint32_t inst_handle; 1983 }; 1984 1985 #define QCAMERA_NAME "qcamera" 1986 #define QCAMERA_SERVER_NAME "qcamera_server" 1987 #define QCAMERA_DEVICE_GROUP_ID 1 1988 #define QCAMERA_VNODE_GROUP_ID 2 1989 1990 enum msm_cam_subdev_type { 1991 CSIPHY_DEV, 1992 CSID_DEV, 1993 CSIC_DEV, 1994 ISPIF_DEV, 1995 VFE_DEV, 1996 AXI_DEV, 1997 VPE_DEV, 1998 SENSOR_DEV, 1999 ACTUATOR_DEV, 2000 EEPROM_DEV, 2001 GESTURE_DEV, 2002 IRQ_ROUTER_DEV, 2003 CPP_DEV, 2004 CCI_DEV, 2005 FLASH_DEV, 2006 }; 2007 2008 struct msm_mctl_set_sdev_data { 2009 uint32_t revision; 2010 enum msm_cam_subdev_type sdev_type; 2011 }; 2012 2013 #define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \ 2014 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 2015 2016 #define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \ 2017 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 2018 2019 #define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \ 2020 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t) 2021 2022 #define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \ 2023 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t) 2024 2025 #define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \ 2026 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t) 2027 2028 #define MSM_CAM_IOCTL_SEND_EVENT \ 2029 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event) 2030 2031 #define MSM_CAM_V4L2_IOCTL_CFG_VPE \ 2032 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd) 2033 2034 #define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \ 2035 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t) 2036 2037 #define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \ 2038 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t) 2039 2040 #define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \ 2041 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t) 2042 2043 #define VIDIOC_MSM_VPE_INIT \ 2044 _IO('V', BASE_VIDIOC_PRIVATE + 15) 2045 2046 #define VIDIOC_MSM_VPE_RELEASE \ 2047 _IO('V', BASE_VIDIOC_PRIVATE + 16) 2048 2049 #define VIDIOC_MSM_VPE_CFG \ 2050 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *) 2051 2052 #define VIDIOC_MSM_AXI_INIT \ 2053 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *) 2054 2055 #define VIDIOC_MSM_AXI_RELEASE \ 2056 _IO('V', BASE_VIDIOC_PRIVATE + 19) 2057 2058 #define VIDIOC_MSM_AXI_CFG \ 2059 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *) 2060 2061 #define VIDIOC_MSM_AXI_IRQ \ 2062 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *) 2063 2064 #define VIDIOC_MSM_AXI_BUF_CFG \ 2065 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *) 2066 2067 #define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \ 2068 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg) 2069 2070 #define VIDIOC_MSM_VFE_INIT \ 2071 _IO('V', BASE_VIDIOC_PRIVATE + 24) 2072 2073 #define VIDIOC_MSM_VFE_RELEASE \ 2074 _IO('V', BASE_VIDIOC_PRIVATE + 25) 2075 2076 struct msm_camera_v4l2_ioctl_t { 2077 uint32_t id; 2078 uint32_t len; 2079 uint32_t trans_code; 2080 void __user *ioctl_ptr; 2081 }; 2082 2083 struct msm_camera_vfe_params_t { 2084 uint32_t operation_mode; 2085 uint32_t capture_count; 2086 uint8_t skip_reset; 2087 uint8_t stop_immediately; 2088 uint16_t port_info; 2089 uint32_t inst_handle; 2090 uint16_t cmd_type; 2091 }; 2092 2093 enum msm_camss_irq_idx { 2094 CAMERA_SS_IRQ_0, 2095 CAMERA_SS_IRQ_1, 2096 CAMERA_SS_IRQ_2, 2097 CAMERA_SS_IRQ_3, 2098 CAMERA_SS_IRQ_4, 2099 CAMERA_SS_IRQ_5, 2100 CAMERA_SS_IRQ_6, 2101 CAMERA_SS_IRQ_7, 2102 CAMERA_SS_IRQ_8, 2103 CAMERA_SS_IRQ_9, 2104 CAMERA_SS_IRQ_10, 2105 CAMERA_SS_IRQ_11, 2106 CAMERA_SS_IRQ_12, 2107 CAMERA_SS_IRQ_MAX 2108 }; 2109 2110 enum msm_cam_hw_idx { 2111 MSM_CAM_HW_MICRO, 2112 MSM_CAM_HW_CCI, 2113 MSM_CAM_HW_CSI0, 2114 MSM_CAM_HW_CSI1, 2115 MSM_CAM_HW_CSI2, 2116 MSM_CAM_HW_CSI3, 2117 MSM_CAM_HW_ISPIF, 2118 MSM_CAM_HW_CPP, 2119 MSM_CAM_HW_VFE0, 2120 MSM_CAM_HW_VFE1, 2121 MSM_CAM_HW_JPEG0, 2122 MSM_CAM_HW_JPEG1, 2123 MSM_CAM_HW_JPEG2, 2124 MSM_CAM_HW_MAX 2125 }; 2126 2127 struct msm_camera_irq_cfg { 2128 /* Bit mask of all the camera hardwares that needs to 2129 * be composited into a single IRQ to the MSM. 2130 * Current usage: (may be updated based on hw changes) 2131 * Bits 31:13 - Reserved. 2132 * Bits 12:0 2133 * 12 - MSM_CAM_HW_JPEG2 2134 * 11 - MSM_CAM_HW_JPEG1 2135 * 10 - MSM_CAM_HW_JPEG0 2136 * 9 - MSM_CAM_HW_VFE1 2137 * 8 - MSM_CAM_HW_VFE0 2138 * 7 - MSM_CAM_HW_CPP 2139 * 6 - MSM_CAM_HW_ISPIF 2140 * 5 - MSM_CAM_HW_CSI3 2141 * 4 - MSM_CAM_HW_CSI2 2142 * 3 - MSM_CAM_HW_CSI1 2143 * 2 - MSM_CAM_HW_CSI0 2144 * 1 - MSM_CAM_HW_CCI 2145 * 0 - MSM_CAM_HW_MICRO 2146 */ 2147 uint32_t cam_hw_mask; 2148 uint8_t irq_idx; 2149 uint8_t num_hwcore; 2150 }; 2151 2152 #define MSM_IRQROUTER_CFG_COMPIRQ \ 2153 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *) 2154 2155 #define MAX_NUM_CPP_STRIPS 8 2156 2157 enum msm_cpp_frame_type { 2158 MSM_CPP_OFFLINE_FRAME, 2159 MSM_CPP_REALTIME_FRAME, 2160 }; 2161 2162 struct msm_cpp_frame_strip_info { 2163 int scale_v_en; 2164 int scale_h_en; 2165 2166 int upscale_v_en; 2167 int upscale_h_en; 2168 2169 int src_start_x; 2170 int src_end_x; 2171 int src_start_y; 2172 int src_end_y; 2173 2174 /* Padding is required for upscaler because it does not 2175 * pad internally like other blocks, also needed for rotation 2176 * rotation expects all the blocks in the stripe to be the same size 2177 * Padding is done such that all the extra padded pixels 2178 * are on the right and bottom 2179 */ 2180 int pad_bottom; 2181 int pad_top; 2182 int pad_right; 2183 int pad_left; 2184 2185 int v_init_phase; 2186 int h_init_phase; 2187 int h_phase_step; 2188 int v_phase_step; 2189 2190 int prescale_crop_width_first_pixel; 2191 int prescale_crop_width_last_pixel; 2192 int prescale_crop_height_first_line; 2193 int prescale_crop_height_last_line; 2194 2195 int postscale_crop_height_first_line; 2196 int postscale_crop_height_last_line; 2197 int postscale_crop_width_first_pixel; 2198 int postscale_crop_width_last_pixel; 2199 2200 int dst_start_x; 2201 int dst_end_x; 2202 int dst_start_y; 2203 int dst_end_y; 2204 2205 int bytes_per_pixel; 2206 unsigned int source_address; 2207 unsigned int destination_address; 2208 unsigned int src_stride; 2209 unsigned int dst_stride; 2210 int rotate_270; 2211 int horizontal_flip; 2212 int vertical_flip; 2213 int scale_output_width; 2214 int scale_output_height; 2215 }; 2216 2217 struct msm_cpp_frame_info_t { 2218 int32_t frame_id; 2219 uint32_t inst_id; 2220 uint32_t client_id; 2221 enum msm_cpp_frame_type frame_type; 2222 uint32_t num_strips; 2223 struct msm_cpp_frame_strip_info *strip_info; 2224 }; 2225 2226 struct msm_ver_num_info { 2227 uint32_t main; 2228 uint32_t minor; 2229 uint32_t rev; 2230 }; 2231 2232 #define VIDIOC_MSM_CPP_CFG \ 2233 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t) 2234 2235 #define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \ 2236 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 2237 2238 #define VIDIOC_MSM_CPP_GET_INST_INFO \ 2239 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 2240 2241 #define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0) 2242 2243 /* Instance Handle - inst_handle 2244 * Data bundle containing the information about where 2245 * to get a buffer for a particular camera instance. 2246 * This is a bitmask containing the following data: 2247 * Buffer Handle Bitmask: 2248 * ------------------------------------ 2249 * Bits : Purpose 2250 * ------------------------------------ 2251 * 31 : is Dev ID valid? 2252 * 30 - 24 : Dev ID. 2253 * 23 : is Image mode valid? 2254 * 22 - 16 : Image mode. 2255 * 15 : is MCTL PP inst idx valid? 2256 * 14 - 8 : MCTL PP inst idx. 2257 * 7 : is Video inst idx valid? 2258 * 6 - 0 : Video inst idx. 2259 */ 2260 #define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF) 2261 #define SET_DEVID_MODE(handle, data) \ 2262 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24))) 2263 #define GET_DEVID_MODE(handle) \ 2264 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF) 2265 2266 #define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF) 2267 #define SET_IMG_MODE(handle, data) \ 2268 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16))) 2269 #define GET_IMG_MODE(handle) \ 2270 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF) 2271 2272 #define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF) 2273 #define SET_MCTLPP_INST_IDX(handle, data) \ 2274 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8))) 2275 #define GET_MCTLPP_INST_IDX(handle) \ 2276 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF) 2277 2278 #define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00) 2279 #define GET_VIDEO_INST_IDX(handle) \ 2280 ((handle & 0x80) ? (handle & 0x7F) : 0xFF) 2281 #define SET_VIDEO_INST_IDX(handle, data) \ 2282 (handle |= (0x1 << 7) | (data & 0x7F)) 2283 2284 #endif /* __LINUX_MSM_CAMERA_H */ 2285