Lines Matching defs:cond

60                         Condition cond) {  in and_()
66 Condition cond) { in eor()
72 Condition cond) { in sub()
77 Condition cond) { in rsb()
82 Condition cond) { in rsbs()
88 Condition cond) { in add()
94 Condition cond) { in adds()
100 Condition cond) { in subs()
106 Condition cond) { in adc()
112 Condition cond) { in sbc()
118 Condition cond) { in rsc()
123 void Arm32Assembler::tst(Register rn, const ShifterOperand& so, Condition cond) { in tst()
129 void Arm32Assembler::teq(Register rn, const ShifterOperand& so, Condition cond) { in teq()
135 void Arm32Assembler::cmp(Register rn, const ShifterOperand& so, Condition cond) { in cmp()
140 void Arm32Assembler::cmn(Register rn, const ShifterOperand& so, Condition cond) { in cmn()
146 const ShifterOperand& so, Condition cond) { in orr()
152 const ShifterOperand& so, Condition cond) { in orrs()
157 void Arm32Assembler::mov(Register rd, const ShifterOperand& so, Condition cond) { in mov()
162 void Arm32Assembler::movs(Register rd, const ShifterOperand& so, Condition cond) { in movs()
168 Condition cond) { in bic()
173 void Arm32Assembler::mvn(Register rd, const ShifterOperand& so, Condition cond) { in mvn()
178 void Arm32Assembler::mvns(Register rd, const ShifterOperand& so, Condition cond) { in mvns()
183 void Arm32Assembler::mul(Register rd, Register rn, Register rm, Condition cond) { in mul()
190 Condition cond) { in mla()
197 Condition cond) { in mls()
204 Register rm, Condition cond) { in umull()
210 void Arm32Assembler::sdiv(Register rd, Register rn, Register rm, Condition cond) { in sdiv()
226 void Arm32Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) { in udiv()
242 void Arm32Assembler::sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) { in sbfx()
261 void Arm32Assembler::ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) { in ubfx()
280 void Arm32Assembler::ldr(Register rd, const Address& ad, Condition cond) { in ldr()
285 void Arm32Assembler::str(Register rd, const Address& ad, Condition cond) { in str()
290 void Arm32Assembler::ldrb(Register rd, const Address& ad, Condition cond) { in ldrb()
295 void Arm32Assembler::strb(Register rd, const Address& ad, Condition cond) { in strb()
300 void Arm32Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh()
305 void Arm32Assembler::strh(Register rd, const Address& ad, Condition cond) { in strh()
310 void Arm32Assembler::ldrsb(Register rd, const Address& ad, Condition cond) { in ldrsb()
315 void Arm32Assembler::ldrsh(Register rd, const Address& ad, Condition cond) { in ldrsh()
320 void Arm32Assembler::ldrd(Register rd, const Address& ad, Condition cond) { in ldrd()
326 void Arm32Assembler::strd(Register rd, const Address& ad, Condition cond) { in strd()
335 Condition cond) { in ldm()
343 Condition cond) { in stm()
348 void Arm32Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) { in vmovs()
353 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd()
358 bool Arm32Assembler::vmovs(SRegister sd, float s_imm, Condition cond) { in vmovs()
373 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd()
389 Condition cond) { in vadds()
395 Condition cond) { in vaddd()
401 Condition cond) { in vsubs()
407 Condition cond) { in vsubd()
413 Condition cond) { in vmuls()
419 Condition cond) { in vmuld()
425 Condition cond) { in vmlas()
431 Condition cond) { in vmlad()
437 Condition cond) { in vmlss()
443 Condition cond) { in vmlsd()
449 Condition cond) { in vdivs()
455 Condition cond) { in vdivd()
460 void Arm32Assembler::vabss(SRegister sd, SRegister sm, Condition cond) { in vabss()
465 void Arm32Assembler::vabsd(DRegister dd, DRegister dm, Condition cond) { in vabsd()
470 void Arm32Assembler::vnegs(SRegister sd, SRegister sm, Condition cond) { in vnegs()
475 void Arm32Assembler::vnegd(DRegister dd, DRegister dm, Condition cond) { in vnegd()
480 void Arm32Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) { in vsqrts()
484 void Arm32Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) { in vsqrtd()
489 void Arm32Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) { in vcvtsd()
494 void Arm32Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) { in vcvtds()
499 void Arm32Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) { in vcvtis()
504 void Arm32Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) { in vcvtid()
509 void Arm32Assembler::vcvtsi(SRegister sd, SRegister sm, Condition cond) { in vcvtsi()
514 void Arm32Assembler::vcvtdi(DRegister dd, SRegister sm, Condition cond) { in vcvtdi()
519 void Arm32Assembler::vcvtus(SRegister sd, SRegister sm, Condition cond) { in vcvtus()
524 void Arm32Assembler::vcvtud(SRegister sd, DRegister dm, Condition cond) { in vcvtud()
529 void Arm32Assembler::vcvtsu(SRegister sd, SRegister sm, Condition cond) { in vcvtsu()
534 void Arm32Assembler::vcvtdu(DRegister dd, SRegister sm, Condition cond) { in vcvtdu()
539 void Arm32Assembler::vcmps(SRegister sd, SRegister sm, Condition cond) { in vcmps()
544 void Arm32Assembler::vcmpd(DRegister dd, DRegister dm, Condition cond) { in vcmpd()
549 void Arm32Assembler::vcmpsz(SRegister sd, Condition cond) { in vcmpsz()
554 void Arm32Assembler::vcmpdz(DRegister dd, Condition cond) { in vcmpdz()
558 void Arm32Assembler::b(Label* label, Condition cond) { in b()
563 void Arm32Assembler::bl(Label* label, Condition cond) { in bl()
583 void Arm32Assembler::EmitType01(Condition cond, in EmitType01()
603 void Arm32Assembler::EmitType5(Condition cond, int offset, bool link) { in EmitType5()
612 void Arm32Assembler::EmitMemOp(Condition cond, in EmitMemOp()
651 void Arm32Assembler::EmitMemOpAddressMode3(Condition cond, in EmitMemOpAddressMode3()
667 void Arm32Assembler::EmitMultiMemOp(Condition cond, in EmitMultiMemOp()
684 void Arm32Assembler::EmitShiftImmediate(Condition cond, in EmitShiftImmediate()
701 void Arm32Assembler::EmitShiftRegister(Condition cond, in EmitShiftRegister()
719 void Arm32Assembler::EmitBranch(Condition cond, Label* label, bool link) { in EmitBranch()
731 void Arm32Assembler::clz(Register rd, Register rm, Condition cond) { in clz()
745 void Arm32Assembler::movw(Register rd, uint16_t imm16, Condition cond) { in movw()
754 void Arm32Assembler::movt(Register rd, uint16_t imm16, Condition cond) { in movt()
763 void Arm32Assembler::EmitMulOp(Condition cond, int32_t opcode, in EmitMulOp()
782 void Arm32Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex()
797 void Arm32Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd()
819 Condition cond) { in strex()
834 void Arm32Assembler::strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) { in strexd()
857 void Arm32Assembler::clrex(Condition cond) { in clrex()
865 void Arm32Assembler::nop(Condition cond) { in nop()
873 void Arm32Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { in vmovsr()
888 void Arm32Assembler::vmovrs(Register rt, SRegister sn, Condition cond) { in vmovrs()
904 Condition cond) { in vmovsrr()
925 Condition cond) { in vmovrrs()
947 Condition cond) { in vmovdrr()
967 Condition cond) { in vmovrrd()
987 void Arm32Assembler::vldrs(SRegister sd, const Address& ad, Condition cond) { in vldrs()
1000 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) { in vstrs()
1014 void Arm32Assembler::vldrd(DRegister dd, const Address& ad, Condition cond) { in vldrd()
1027 void Arm32Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) { in vstrd()
1041 void Arm32Assembler::vpushs(SRegister reg, int nregs, Condition cond) { in vpushs()
1046 void Arm32Assembler::vpushd(DRegister reg, int nregs, Condition cond) { in vpushd()
1051 void Arm32Assembler::vpops(SRegister reg, int nregs, Condition cond) { in vpops()
1056 void Arm32Assembler::vpopd(DRegister reg, int nregs, Condition cond) { in vpopd()
1061 void Arm32Assembler::EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond) { in EmitVPushPop()
1087 void Arm32Assembler::EmitVFPsss(Condition cond, int32_t opcode, in EmitVFPsss()
1105 void Arm32Assembler::EmitVFPddd(Condition cond, int32_t opcode, in EmitVFPddd()
1123 void Arm32Assembler::EmitVFPsd(Condition cond, int32_t opcode, in EmitVFPsd()
1138 void Arm32Assembler::EmitVFPds(Condition cond, int32_t opcode, in EmitVFPds()
1154 bool setcc, Condition cond) { in Lsl()
1165 bool setcc, Condition cond) { in Lsr()
1177 bool setcc, Condition cond) { in Asr()
1189 bool setcc, Condition cond) { in Ror()
1198 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { in Rrx()
1208 bool setcc, Condition cond) { in Lsl()
1218 bool setcc, Condition cond) { in Lsr()
1228 bool setcc, Condition cond) { in Asr()
1238 bool setcc, Condition cond) { in Ror()
1246 void Arm32Assembler::vmstat(Condition cond) { // VMRS APSR_nzcv, FPSCR in vmstat()
1270 void Arm32Assembler::blx(Register rm, Condition cond) { in blx()
1280 void Arm32Assembler::bx(Register rm, Condition cond) { in bx()
1290 void Arm32Assembler::Push(Register rd, Condition cond) { in Push()
1295 void Arm32Assembler::Pop(Register rd, Condition cond) { in Pop()
1300 void Arm32Assembler::PushList(RegList regs, Condition cond) { in PushList()
1305 void Arm32Assembler::PopList(RegList regs, Condition cond) { in PopList()
1310 void Arm32Assembler::Mov(Register rd, Register rm, Condition cond) { in Mov()
1350 void Arm32Assembler::AddConstant(Register rd, int32_t value, Condition cond) { in AddConstant()
1356 Condition cond) { in AddConstant()
1392 Condition cond) { in AddConstantSetFlags()
1417 void Arm32Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { in LoadImmediate()
1439 Condition cond) { in LoadFromOffset()
1479 Condition cond) { in LoadSFromOffset()
1497 Condition cond) { in LoadDFromOffset()
1516 Condition cond) { in StoreToOffset()
1551 Condition cond) { in StoreSToOffset()
1569 Condition cond) { in StoreDToOffset()