Lines Matching refs:OpNode

96 class T_CMP_pat <InstHexagon MI, PatFrag OpNode, PatLeaf ImmPred>
97   : Pat<(i1 (OpNode (i32 IntRegs:$src1), ImmPred:$src2)),
404 multiclass Addri_base<string mnemonic, SDNode OpNode> {
428 class T_ALU32ri_logical <string mnemonic, SDNode OpNode, bits<2> MinOp>
432   [(set (i32 IntRegs:$Rd), (OpNode (i32 IntRegs:$Rs), s32ImmPred:$s10))]> {
4454 class S_2OpInstImmI6<string Mnemonic, SDNode OpNode, bits<3>MinOp>
4456   [(set (i64 DoubleRegs:$dst), (OpNode (i64 DoubleRegs:$src1),
5275 multiclass xtype_imm_acc<string opc1, SDNode OpNode, bits<2>minOp> {
5277   defm _acc  : xtype_imm_base< opc1, "+= ", OpNode, add, 0b001, minOp>;
5279   defm _nac  : xtype_imm_base< opc1, "-= ", OpNode, sub, 0b000, minOp>;
5280   defm _and  : xtype_imm_base< opc1, "&= ", OpNode, and, 0b010, minOp>;
5281   defm _or   : xtype_imm_base< opc1, "|= ", OpNode,  or, 0b011, minOp>;
5284 multiclass xtype_xor_imm_acc<string opc1, SDNode OpNode, bits<2>minOp> {
5286   defm _xacc  : xtype_imm_base< opc1, "^= ", OpNode, xor, 0b100, minOp>;
5297 multiclass xtype_reg_acc_r<string opc1, SDNode OpNode, bits<2>minOp> {
5299   def _acc : T_shift_reg_acc_r <opc1, "+= ", OpNode, add, 0b11, minOp>;
5301   def _nac : T_shift_reg_acc_r <opc1, "-= ", OpNode, sub, 0b10, minOp>;
5302   def _and : T_shift_reg_acc_r <opc1, "&= ", OpNode, and, 0b01, minOp>;
5303   def _or  : T_shift_reg_acc_r <opc1, "|= ", OpNode,  or, 0b00, minOp>;
5306 multiclass xtype_reg_acc_p<string opc1, SDNode OpNode, bits<2>minOp> {
5308   def _acc : T_shift_reg_acc_p <opc1, "+= ", OpNode, add, 0b110, minOp>;
5310   def _nac : T_shift_reg_acc_p <opc1, "-= ", OpNode, sub, 0b100, minOp>;
5311   def _and : T_shift_reg_acc_p <opc1, "&= ", OpNode, and, 0b010, minOp>;
5312   def _or  : T_shift_reg_acc_p <opc1, "|= ", OpNode,  or, 0b000, minOp>;
5313   def _xor : T_shift_reg_acc_p <opc1, "^= ", OpNode, xor, 0b011, minOp>;
5316 multiclass xtype_reg_acc<string OpcStr, SDNode OpNode, bits<2> minOp > {
5317   defm _r_r : xtype_reg_acc_r <OpcStr, OpNode, minOp>;
5318   defm _r_p : xtype_reg_acc_p <OpcStr, OpNode, minOp>;
5418 class T_S3op_shift32 <string mnemonic, SDNode OpNode, bits<2> MinOp>
5420     [(set (i32 IntRegs:$dst), (OpNode (i32 IntRegs:$src1),
5428 class T_S3op_shift64 <string mnemonic, SDNode OpNode, bits<2> MinOp>
5430     [(set (i64 DoubleRegs:$dst), (OpNode (i64 DoubleRegs:$src1),