Lines Matching refs:Pd

257   : ALU32_rr<(outs PredRegs:$Pd), (ins IntRegs:$Rs, IntRegs:$Rt),
258 "$Pd = "#mnemonic#"($Rs, $Rt)",
264 bits<2> Pd;
273 let Inst{1-0} = Pd;
956 : ALU64_rr <(outs PredRegs:$Pd),
958 "$Pd = "#Str#"($Rss, $Rtt)", [],
960 bits<2> Pd;
969 let Inst{1-0} = Pd;
1013 (outs PredRegs:$Pd), (ins IntRegs:$Rs, s8Ext:$s8),
1014 "$Pd = cmp.ge($Rs, #$s8)">;
1016 (outs PredRegs:$Pd), (ins IntRegs:$Rs, u8Ext:$s8),
1017 "$Pd = cmp.geu($Rs, #$s8)">;
1209 : ALU64_rr<(outs PredRegs:$Pd), (ins DoubleRegs:$Rs, DoubleRegs:$Rt),
1210 "$Pd = "#mnemonic#"($Rs, $Rt)", [], "", ALU64_tc_2early_SLOT23> {
1215 bits<2> Pd;
1224 let Inst{1-0} = Pd;
1337 : CRInst<(outs PredRegs:$Pd), (ins PredRegs:$Ps),
1338 "$Pd = " # MnOp # "($Ps)", [], "", CR_tc_2early_SLOT23> {
1339 bits<2> Pd;
1348 let Inst{1-0} = Pd;
1360 : CRInst<(outs PredRegs:$Pd), (ins PredRegs:$Ps, PredRegs:$Pt),
1361 "$Pd = " # MnOp # "($Ps, " # !if (IsNeg,"!","") # "$Pt)",
1363 bits<2> Pd;
1374 let Inst{1-0} = Pd;
2217 : ST0Inst <(outs PredRegs:$Pd), (ins IntRegs:$Rs, RC:$Rt),
2218 mnemonic#"($Rs, $Pd) = $Rt"> {
2219 bits<2> Pd;
2229 let Inst{1-0} = Pd;
4258 : SInst<(outs PredRegs:$Pd), (ins IntRegs:$Rs, u5Imm:$u5),
4259 "$Pd = "#MnOp#"($Rs, #$u5)",
4261 bits<2> Pd;
4270 let Inst{1-0} = Pd;
4275 : SInst<(outs PredRegs:$Pd), (ins IntRegs:$Rs, IntRegs:$Rt),
4276 "$Pd = "#MnOp#"($Rs, $Rt)",
4278 bits<2> Pd;
4286 let Inst{1-0} = Pd;
4305 : SInst<(outs PredRegs:$Pd), (ins IntRegs:$Rs, u6Imm:$u6),
4306 "$Pd = "#MnOp#"($Rs, #$u6)",
4308 bits<2> Pd;
4317 let Inst{1-0} = Pd;
4322 : SInst<(outs PredRegs:$Pd), (ins IntRegs:$Rs, IntRegs:$Rt),
4323 "$Pd = "#MnOp#"($Rs, $Rt)",
4325 bits<2> Pd;
4334 let Inst{1-0} = Pd;
4399 def C2_tfrrp: SInst<(outs PredRegs:$Pd), (ins IntRegs:$Rs),
4400 "$Pd = $Rs", [], "", S_2op_tc_2early_SLOT23> {
4401 bits<2> Pd;
4407 let Inst{1-0} = Pd;
5081 // Map from Rs = Pd to Pd = mux(Pd, #1, #0)
5085 // Map from Rss = Pd to Rdd = sxtw (mux(Pd, #1, #0))