| /external/vogar/src/vogar/commands/ |
| D | Rm.java | 25 public final class Rm { class
28 public Rm(Log log) { in Rm() method in Rm
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1144 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1181 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
1481 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1585 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
1630 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
1849 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2104 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2132 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2276 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2298 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
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| /external/lldb/source/Plugins/Instruction/ARM/ |
| D | EmulateInstructionARM.cpp | 739 uint32_t Rm; // the source register in EmulateMOVRdRm() local
1124 uint32_t Rm; // the source register in EmulateMVNReg() local
1390 uint32_t Rm; // the second operand in EmulateADDSPRm() local
1548 uint32_t Rm; // the register with the target address in EmulateBLXRm() local
1600 uint32_t Rm; // the register with the target address in EmulateBXRm() local
1654 uint32_t Rm; // the register with the target address in EmulateBXJRm() local
2392 …uint32_t Rm; // the index register which contains an integer pointing to a byte/halfword in th… in EmulateTB() local
2642 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
2777 uint32_t Rm; // the second operand in EmulateCMNReg() local
2901 uint32_t Rm; // the second operand in EmulateCMPReg() local
[all …]
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| /external/v8/src/arm/ |
| D | disasm-arm.cc | 416 void Decoder::FormatNeonMemory(int Rn, int align, int Rm) { in FormatNeonMemory()
1577 int Rm = instr->VmValue(); in DecodeSpecialCondition() local
1590 int Rm = instr->VmValue(); in DecodeSpecialCondition() local
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| D | simulator-arm.cc | 3503 int Rm = instr->VmValue(); in DecodeSpecialCondition() local
3544 int Rm = instr->VmValue(); in DecodeSpecialCondition() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2770 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2777 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2807 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2820 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2839 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2859 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2866 unsigned Rm = MI->getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2883 unsigned Rm = MI->getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
2896 unsigned Rm = MI->getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 737 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1290 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 874 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1081 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
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| /external/v8/src/arm64/ |
| D | assembler-arm64.h | 1772 static Instr Rm(CPURegister rm) { in Rm() function
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| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.h | 3694 static Instr Rm(CPURegister rm) { in Rm() function
|