| /external/eigen/Eigen/src/Geometry/ |
| D | Umeyama.h | 135 TransformationMatrixType Rt = TransformationMatrixType::Identity(m+1,m+1); variable
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1480 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeAddrMode2IdxInstruction() local
1628 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeAddrMode3Instruction() local
3319 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadShift() local
3401 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadImm8() local
3484 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadImm12() local
3563 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadT() local
3601 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadLabel() local
3756 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LdStPre() local
4166 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeDoubleRegLoad() local
4188 unsigned Rt = fieldFromInstruction(Insn, 0, 4); in DecodeDoubleRegStore() local
[all …]
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 519 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeAddiGroupBranch() local
558 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeDaddiGroupBranch() local
598 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezlGroupBranch() local
643 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzlGroupBranch() local
685 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzGroupBranch() local
734 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezGroupBranch() local
1411 unsigned Rt = fieldFromInstruction(Insn, 16, 5); in DecodeSpecial3LlSc() local
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 830 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeUnsignedLdStInstruction() local
891 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeSignedLdStInstruction() local
1076 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeExclusiveLdStInstruction() local
1159 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodePairLdStInstruction() local
1525 uint64_t Rt = fieldFromInstruction(insn, 0, 5); in DecodeTestAndBranch() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2769 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2776 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2806 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2819 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2842 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2857 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2881 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2890 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2926 unsigned Rt = MI->getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 3319 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3336 unsigned Rt = Inst.getOperand(0).getReg(); in validateInstruction() local
3349 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3365 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3398 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3417 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
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| /external/lldb/source/Plugins/Instruction/ARM/ |
| D | EmulateInstructionARM.cpp | 367 uint32_t Rt; // the source register in EmulatePUSH() local
490 uint32_t Rt; // the destination register in EmulatePOP() local
1218 uint32_t Rt; // the destination register in EmulateLDRRtPCRelative() local
1904 uint32_t Rt; // the source register in EmulateSTRRtSP() local
3877 uint32_t Rt; // the destination register in EmulateLDRRtRnImm() local
5194 uint32_t Rt = ReadCoreReg (t, &success); in EmulateSTRHRegister() local
9836 uint32_t Rt = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + t, 0, &success); in EmulateSTREX() local
9928 uint32_t Rt = ReadCoreReg (t, &success); in EmulateSTRBImmARM() local
10031 uint32_t Rt = ReadCoreReg (t, &success); in EmulateSTRImmARM() local
10579 uint32_t Rt = ReadCoreReg (t, &success); in EmulateSTRDReg() local
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| /external/pdfium/core/src/fxcodec/lcms2/lcms2-2.6/src/ |
| D | cmspcs.c | 638 cmsFloat64Number Rt = -sin(2 * RADIANS(delta_ro)) * Rc; in cmsCIE2000DeltaE() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 5886 unsigned Rt = MRI->getEncodingValue(Reg1); in ParseInstruction() local
6118 const unsigned Rt = MRI->getEncodingValue(RtReg); in validateInstruction() local
6146 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() local
6163 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() local
6173 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() local
6191 const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() local
6214 const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() local
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| /external/v8/src/arm64/ |
| D | assembler-arm64.h | 1782 static Instr Rt(CPURegister rt) { in Rt() function
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| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.h | 3710 static Instr Rt(CPURegister rt) { in Rt() function
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| /external/chromium-trace/trace-viewer/tracing/third_party/d3/ |
| D | d3.min.js | 1 … t=1;n*t%1;)t*=10;return t}function r(n,t){try{for(var e in t)Object.defineProperty(n.prototype,e,… function
|