| /art/compiler/utils/arm/ |
| D | assembler_arm32.cc | 60 Condition cond) { in and_()
66 Condition cond) { in eor()
72 Condition cond) { in sub()
77 Condition cond) { in rsb()
82 Condition cond) { in rsbs()
88 Condition cond) { in add()
94 Condition cond) { in adds()
100 Condition cond) { in subs()
106 Condition cond) { in adc()
112 Condition cond) { in sbc()
[all …]
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| D | assembler_thumb2.cc | 55 Condition cond) { in and_()
61 Condition cond) { in eor()
67 Condition cond) { in sub()
73 Condition cond) { in rsb()
79 Condition cond) { in rsbs()
85 Condition cond) { in add()
91 Condition cond) { in adds()
97 Condition cond) { in subs()
103 Condition cond) { in adc()
109 Condition cond) { in sbc()
[all …]
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| D | assembler_thumb2.h | 449 void CheckCondition(Condition cond) { in CheckCondition()
461 void CheckConditionLastIt(Condition cond) { in CheckConditionLastIt()
615 void ResetTypeAndCondition(Type type, Condition cond) { in ResetTypeAndCondition()
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| D | assembler_arm_test.h | 85 std::vector<Cond>& cond = GetConditions(); in RepeatTemplatedRRIIC() local
176 std::vector<Cond>& cond = GetConditions(); in RepeatTemplatedRRiiC() local
261 const std::vector<Cond>& cond, in RepeatTemplatedRRC()
325 const std::vector<Cond>& cond, in RepeatTemplatedRRRC()
392 const std::vector<Cond>& cond, in RepeatTemplatedRSC()
447 const std::vector<Cond>& cond, in RepeatTemplatedRRSC()
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| /art/test/476-checker-ctor-memory-barrier/src/ |
| D | Main.java | 32 public ClassWithFinals(boolean cond) { in ClassWithFinals()
79 public InheritFromClassWithFinals(boolean cond) { in InheritFromClassWithFinals()
106 public HaveFinalsAndInheritFromClassWithFinals(boolean cond) { in HaveFinalsAndInheritFromClassWithFinals()
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| /art/test/112-double-math/src/ |
| D | Main.java | 18 public static double cond_neg_double(double value, boolean cond) { in cond_neg_double()
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| /art/compiler/dex/ |
| D | global_value_numbering.cc | 204 bool GlobalValueNumbering::IsBlockEnteredOnTrue(uint16_t cond, BasicBlockId bb_id) { in IsBlockEnteredOnTrue()
221 bool GlobalValueNumbering::IsTrueInBlock(uint16_t cond, BasicBlockId bb_id) { in IsTrueInBlock()
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| /art/compiler/optimizing/ |
| D | boolean_simplifier.cc | 65 static HInstruction* GetOppositeCondition(HInstruction* cond) { in GetOppositeCondition()
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| D | bounds_check_elimination.cc | 819 HCondition* cond; in AddLoopBodyEntryTest() local
859 HCondition* cond = new (graph->GetArena()) HLessThan(value, const_instr); in AddDeoptimizationConstant() local
1007 HCondition* cond = new (graph->GetArena()) HGreaterThan(value, added); in AddDeoptimizationArrayLength() local
1191 IfCondition cond, in HandleIfBetweenTwoMonotonicValueRanges()
1254 void HandleIf(HIf* instruction, HInstruction* left, HInstruction* right, IfCondition cond) { in HandleIf()
1531 HCondition* cond = instruction->InputAt(0)->AsCondition(); in VisitIf() local
1771 HCondition* cond = new (GetGraph()->GetArena()) HLessThanOrEqual(array_length, const_instr); in AddCompareWithDeoptimization() local
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| D | bounds_check_elimination_test.cc | 366 IfCondition cond = kCondGE) { in BuildSSAGraph1()
501 IfCondition cond = kCondLE) { in BuildSSAGraph2()
629 IfCondition cond) { in BuildSSAGraph3()
744 IfCondition cond = kCondGE) { in BuildSSAGraph4()
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| D | gvn.cc | 204 void DeleteAllImpureWhich(Functor cond) { in DeleteAllImpureWhich()
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| D | code_generator_arm64.cc | 70 inline Condition ARM64Condition(IfCondition cond) { in ARM64Condition()
1587 Condition cond = ARM64Condition(instruction->GetCondition()); in VisitCondition() local
1741 HInstruction* cond = instruction->InputAt(0); in GenerateTestAndBranch() local
1798 HInstruction* cond = if_instr->InputAt(0); in VisitIf() local
1822 HInstruction* cond = deoptimize->InputAt(0); in VisitDeoptimize() local
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| D | code_generator_arm.cc | 321 inline Condition ARMCondition(IfCondition cond) { in ARMCondition()
335 inline Condition ARMOppositeCondition(IfCondition cond) { in ARMOppositeCondition()
940 HInstruction* cond = instruction->InputAt(0); in GenerateTestAndBranch() local
991 HInstruction* cond = if_instr->InputAt(0); in VisitIf() local
1015 HInstruction* cond = deoptimize->InputAt(0); in VisitDeoptimize() local
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| D | code_generator_mips64.cc | 1954 HInstruction* cond = instruction->InputAt(0); in GenerateTestAndBranch() local
2061 HInstruction* cond = if_instr->InputAt(0); in VisitIf() local
2085 HInstruction* cond = deoptimize->InputAt(0); in VisitDeoptimize() local
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| /art/test/441-checker-inliner/src/ |
| D | Main.java | 147 public static int InlineWithControlFlow(boolean cond) { in InlineWithControlFlow()
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| /art/disassembler/ |
| D | disassembler_arm.cc | 77 void DisassemblerArm::DumpCond(std::ostream& os, uint32_t cond) { in DumpCond()
250 uint32_t cond = (instruction >> 28) & 0xf; in DumpArm() local
1204 uint32_t cond = (instr >> 22) & 0xF; in DumpThumb32() local
1240 uint32_t cond = (instr >> 22) & 0xF; in DumpThumb32() local
1743 uint32_t cond = (instr >> 8) & 0xF; in DumpThumb16() local
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| /art/test/442-checker-constant-folding/src/ |
| D | Main.java | 223 public static int JumpsAndConditionals(boolean cond) { in JumpsAndConditionals()
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| /art/compiler/dex/quick/mips/ |
| D | int_mips.cc | 83 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
149 LIR* MipsMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) { in OpCmpImmBranch()
478 LIR* MipsMir2Lir::OpIT(ConditionCode cond, const char* guide) { in OpIT()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 75 void Arm64Assembler::AddConstant(XRegister rd, int32_t value, Condition cond) { in AddConstant()
80 Condition cond) { in AddConstant()
200 Condition cond) { in LoadImmediate()
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| /art/compiler/dex/quick/x86/ |
| D | int_x86.cc | 75 X86ConditionCode X86ConditionEncoding(ConditionCode cond) { in X86ConditionEncoding()
99 LIR* X86Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
108 LIR* X86Mir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, in OpCmpImmBranch()
1611 LIR* X86Mir2Lir::OpIT(ConditionCode cond, const char* guide) { in OpIT()
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| D | utility_x86.cc | 945 LIR* X86Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, RegStorage temp_reg, RegStorage base_reg, in OpCmpMemImmBranch()
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| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 35 LIR* Arm64Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
268 LIR* Arm64Mir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, in OpCmpImmBranch()
300 LIR* Arm64Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, RegStorage temp_reg, in OpCmpMemImmBranch()
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| /art/compiler/dex/quick/arm/ |
| D | int_arm.cc | 35 LIR* ArmMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
380 LIR* ArmMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) { in OpCmpImmBranch()
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| /art/compiler/dex/quick/ |
| D | gen_common.cc | 351 ConditionCode cond; in GenCompareAndBranch() local
414 ConditionCode cond; in GenCompareZeroAndBranch() local
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| D | codegen_util.cc | 1257 LIR *Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, RegStorage temp_reg, RegStorage base_reg, in OpCmpMemImmBranch()
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