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Searched defs:r_base (Results 1 – 15 of 15) sorted by relevance

/art/compiler/dex/quick/mips/
Dutility_mips.cc523 LIR* MipsMir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, in OpMovRegMem()
530 LIR* MipsMir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type) { in OpMovMemReg()
569 LIR* MipsMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed()
643 LIR* MipsMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed()
690 LIR* MipsMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody()
851 LIR* MipsMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, OpSize size, in LoadBaseDisp()
875 LIR* MipsMir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDispBody()
1004 LIR* MipsMir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, OpSize size, in StoreBaseDisp()
1034 LIR* MipsMir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem()
Dcall_mips.cc108 RegStorage r_base = AllocPtrSizeTemp(); in GenLargeSparseSwitch() local
197 RegStorage r_base = AllocPtrSizeTemp(); in GenLargePackedSwitch() local
Dtarget_mips.cc789 LIR* MipsMir2Lir::GenAtomic64Load(RegStorage r_base, int displacement, RegStorage r_dest) { in GenAtomic64Load()
811 LIR* MipsMir2Lir::GenAtomic64Store(RegStorage r_base, int displacement, RegStorage r_src) { in GenAtomic64Store()
Dint_mips.cc417 LIR* MipsMir2Lir::OpVldm(RegStorage r_base, int count) { in OpVldm()
423 LIR* MipsMir2Lir::OpVstm(RegStorage r_base, int count) { in OpVstm()
/art/compiler/dex/quick/x86/
Dutility_x86.cc257 LIR* X86Mir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type) { in OpMovRegMem()
309 LIR* X86Mir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type) { in OpMovMemReg()
370 LIR* X86Mir2Lir::OpRegMem(OpKind op, RegStorage r_dest, RegStorage r_base, int offset) { in OpRegMem()
556 LIR* X86Mir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem()
643 LIR* X86Mir2Lir::LoadBaseIndexedDisp(RegStorage r_base, RegStorage r_index, int scale, in LoadBaseIndexedDisp()
771 LIR* X86Mir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed()
776 LIR* X86Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp()
791 LIR* X86Mir2Lir::StoreBaseIndexedDisp(RegStorage r_base, RegStorage r_index, int scale, in StoreBaseIndexedDisp()
905 LIR* X86Mir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed()
910 LIR* X86Mir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, OpSize size, in StoreBaseDisp()
Dint_x86.cc1091 void X86Mir2Lir::OpLea(RegStorage r_base, RegStorage reg1, RegStorage reg2, int scale, int offset) { in OpLea()
1452 LIR* X86Mir2Lir::OpVldm(RegStorage r_base, int count) { in OpVldm()
1458 LIR* X86Mir2Lir::OpVstm(RegStorage r_base, int count) { in OpVstm()
1976 int r_base = rs_rX86_SP_32.GetReg(); in GenLongRegOrMemOp() local
2019 int r_base = rs_rX86_SP_32.GetReg(); in GenLongArith() local
2869 int r_base = rs_rX86_SP_32.GetReg(); in GenLongImm() local
2900 int r_base = rs_rX86_SP_32.GetReg(); in GenLongImm() local
Dtarget_x86.cc905 int r_base = rs_rX86_SP_32.GetReg(); in GenConstWide() local
/art/compiler/dex/quick/arm/
Dutility_arm.cc422 LIR* ArmMir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type) { in OpMovRegMem()
428 LIR* ArmMir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type) { in OpMovMemReg()
748 LIR* ArmMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed()
814 LIR* ArmMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed()
880 LIR* ArmMir2Lir::LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base, in LoadStoreUsingInsnWithOffsetImm8Shl2()
910 LIR* ArmMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody()
1030 LIR* ArmMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp()
1060 LIR* ArmMir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDispBody()
1172 LIR* ArmMir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDisp()
1246 LIR* ArmMir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem()
Dcall_arm.cc69 RegStorage r_base = AllocTemp(); in GenLargeSparseSwitch() local
Dint_arm.cc1127 LIR* ArmMir2Lir::OpVldm(RegStorage r_base, int count) { in OpVldm()
1131 LIR* ArmMir2Lir::OpVstm(RegStorage r_base, int count) { in OpVstm()
/art/compiler/dex/quick/arm64/
Dutility_arm64.cc675 LIR* Arm64Mir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, in OpMovRegMem()
682 LIR* Arm64Mir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, in OpMovMemReg()
1024 LIR* Arm64Mir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed()
1109 LIR* Arm64Mir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed()
1191 LIR* Arm64Mir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody()
1272 LIR* Arm64Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp()
1287 LIR* Arm64Mir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDispBody()
1362 LIR* Arm64Mir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDisp()
1390 LIR* Arm64Mir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem()
Dcall_arm64.cc68 RegStorage r_base = AllocTempWide(); in GenLargeSparseSwitch() local
Dint_arm64.cc966 LIR* Arm64Mir2Lir::OpVldm(RegStorage r_base, int count) { in OpVldm()
972 LIR* Arm64Mir2Lir::OpVstm(RegStorage r_base, int count) { in OpVstm()
/art/compiler/dex/quick/
Dmir_to_lir.h976 LIR* LoadWordDisp(RegStorage r_base, int displacement, RegStorage r_dest) { in LoadWordDisp()
980 LIR* Load32Disp(RegStorage r_base, int displacement, RegStorage r_dest) { in Load32Disp()
984 LIR* LoadRefDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadRefDisp()
989 LIR* LoadRefIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, int scale) { in LoadRefIndexed()
1005 LIR* StoreWordDisp(RegStorage r_base, int displacement, RegStorage r_src) { in StoreWordDisp()
1009 LIR* StoreRefDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreRefDisp()
1014 LIR* StoreRefIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale) { in StoreRefIndexed()
1018 LIR* Store32Disp(RegStorage r_base, int displacement, RegStorage r_src) { in Store32Disp()
Dgen_common.cc96 RegStorage r_base = TargetReg(kArg0, kRef); in GenGetOtherTypeForSgetSput() local
691 RegStorage r_base; in GenSput() local
769 RegStorage r_base; in GenSget() local