| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 150 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity()
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.cc | 2436 void UseScratchRegisterScope::Include(const Register& reg1, in Include()
2449 void UseScratchRegisterScope::Include(const FPRegister& reg1, in Include()
2468 void UseScratchRegisterScope::Exclude(const Register& reg1, in Exclude()
2477 void UseScratchRegisterScope::Exclude(const FPRegister& reg1, in Exclude()
2486 void UseScratchRegisterScope::Exclude(const CPURegister& reg1, in Exclude()
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| D | assembler-a64.cc | 5362 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, in AreAliased()
5397 bool AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, in AreSameSizeAndType()
5414 bool AreSameFormat(const VRegister& reg1, const VRegister& reg2, in AreSameFormat()
5425 bool AreConsecutive(const VRegister& reg1, const VRegister& reg2, in AreConsecutive()
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| /external/v8/src/x87/ |
| D | assembler-x87.h | 672 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } in cmp()
754 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } in test()
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| D | macro-assembler-x87.cc | 2970 bool AreAliased(Register reg1, in AreAliased()
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| D | lithium-codegen-x87.cc | 506 void LCodeGen::X87LoadForUsage(X87Register reg1, X87Register reg2) { in X87LoadForUsage()
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| /external/v8/test/cctest/ |
| D | test-utils-arm64.cc | 148 const Register& reg1) { in Equal64()
|
| /external/mesa3d/src/mesa/program/ |
| D | register_allocate.c | 189 struct ra_reg *reg1 = ®s->regs[r1]; in ra_add_conflict_list() local
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| /external/aac/libFDK/src/ |
| D | fixpoint_math.cpp | 430 FIXP_DBL reg1, reg2, regtmp ; in invSqrtNorm2() local
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| /external/vixl/test/ |
| D | test-utils-a64.cc | 180 const Register& reg1) { in Equal64()
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| /external/v8/src/ia32/ |
| D | assembler-ia32.h | 689 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } in cmp()
771 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } in test()
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| D | macro-assembler-ia32.cc | 3010 bool AreAliased(Register reg1, in AreAliased()
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| /external/v8/src/arm/ |
| D | macro-assembler-arm.cc | 195 void MacroAssembler::Swap(Register reg1, in Swap()
2977 void MacroAssembler::JumpIfNotBothSmi(Register reg1, in JumpIfNotBothSmi()
3003 void MacroAssembler::JumpIfEitherSmi(Register reg1, in JumpIfEitherSmi()
3945 Register GetRegisterThatIsNotOneOf(Register reg1, in GetRegisterThatIsNotOneOf()
3996 bool AreAliased(Register reg1, in AreAliased()
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 532 Register reg1, in LoadFromNumberDictionary()
3072 void MacroAssembler::Swap(Register reg1, in Swap()
5148 void MacroAssembler::JumpIfNotBothSmi(Register reg1, in JumpIfNotBothSmi()
5158 void MacroAssembler::JumpIfEitherSmi(Register reg1, in JumpIfEitherSmi()
5947 Register GetRegisterThatIsNotOneOf(Register reg1, in GetRegisterThatIsNotOneOf()
5995 bool AreAliased(Register reg1, in AreAliased()
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_T2_32.c | 63 #define IS_2_LO_REGS(reg1, reg2) \ argument
65 #define IS_3_LO_REGS(reg1, reg2, reg3) \ argument
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 537 Register reg1, in LoadFromNumberDictionary()
2981 void MacroAssembler::Swap(Register reg1, in Swap()
5097 void MacroAssembler::JumpIfNotBothSmi(Register reg1, in JumpIfNotBothSmi()
5112 void MacroAssembler::JumpIfEitherSmi(Register reg1, in JumpIfEitherSmi()
5932 Register GetRegisterThatIsNotOneOf(Register reg1, in GetRegisterThatIsNotOneOf()
5980 bool AreAliased(Register reg1, in AreAliased()
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 206 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, in GetAllocatableRegisterThatIsNotOneOf()
219 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, in AreAliased()
256 bool AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, in AreSameSizeAndType()
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| D | full-codegen-arm64.cc | 66 void EmitJumpIfEitherNotSmi(Register reg1, Register reg2, Label* target) { in EmitJumpIfEitherNotSmi()
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| /external/valgrind/VEX/priv/ |
| D | host_arm64_isel.c | 903 HReg reg1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk() local
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| D | host_s390_isel.c | 3348 HReg reg1, reg2; in s390_isel_cc() local
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| /external/v8/src/x64/ |
| D | macro-assembler-x64.cc | 4984 bool AreAliased(Register reg1, in AreAliased()
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| /external/valgrind/perf/ |
| D | tinycc.c | 16260 int mod, reg1, reg2, sib_reg1; in asm_modrm() local
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| /external/owasp/sanitizer/tools/findbugs/lib/ |
| D | findbugs.jar | META-INF/
META-INF/MANIFEST.MF
default.xsl
edu/
edu/umd ... |