/art/compiler/dex/quick/arm/ |
D | assemble_arm.cc | 1291 CodeOffset target = lir_target->offset + in AssembleLIR() local 1371 CodeOffset target = target_lir->offset + in AssembleLIR() local 1417 CodeOffset target = target_lir->offset + in AssembleLIR() local 1434 CodeOffset target = target_lir->offset + in AssembleLIR() local 1451 CodeOffset target = target_lir->offset + in AssembleLIR() local 1480 CodeOffset target = lir->operands[1]; in AssembleLIR() local 1497 CodeOffset target = lir->operands[1]; in AssembleLIR() local 1508 LIR* target = lir->target; in AssembleLIR() local 1563 LIR* target = lir->target; in AssembleLIR() local 1573 LIR* target = lir->target; in AssembleLIR() local
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D | int_arm.cc | 35 LIR* ArmMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch() 380 LIR* ArmMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) { in OpCmpImmBranch() 930 LIR* target = NewLIR0(kPseudoTargetLabel); in GenInlinedCas() local 1089 void ArmMir2Lir::OpPcRelLoad(RegStorage reg, LIR* target) { in OpPcRelLoad() 1166 LIR* ArmMir2Lir::OpTestSuspend(LIR* target) { in OpTestSuspend() 1182 LIR* ArmMir2Lir::OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target) { in OpDecAndBranch()
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D | call_arm.cc | 85 LIR* target = NewLIR0(kPseudoTargetLabel); in GenLargeSparseSwitch() local 139 LIR* target = NewLIR0(kPseudoTargetLabel); in GenLargePackedSwitch() local
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/art/compiler/dex/quick/mips/ |
D | assemble_mips.cc | 723 CodeOffset target = target_lir->offset; in AssembleInstructions() local 737 CodeOffset target = target_lir->offset; in AssembleInstructions() local 751 CodeOffset target = target_lir->offset; in AssembleInstructions() local 764 CodeOffset target = lir->operands[0]; in AssembleInstructions() local 773 CodeOffset target = start_addr + target_lir->offset; in AssembleInstructions() local 777 CodeOffset target = start_addr + target_lir->offset; in AssembleInstructions() local
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D | int_mips.cc | 77 LIR* target = NewLIR0(kPseudoTargetLabel); in GenCmpLong() local 83 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch() 149 LIR* MipsMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) { in OpCmpImmBranch() 411 void MipsMir2Lir::OpPcRelLoad(RegStorage reg, LIR* target) { in OpPcRelLoad() 454 LIR* MipsMir2Lir::OpTestSuspend(LIR* target) { in OpTestSuspend() 460 LIR* MipsMir2Lir::OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target) { in OpDecAndBranch()
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D | call_mips.cc | 210 LIR* target = NewLIR0(kPseudoTargetLabel); in GenLargePackedSwitch() local 277 InstructionSet target = (cu_->target64) ? kMips64 : kMips; in GenEntrySequence() local
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D | fp_mips.cc | 211 QuickEntrypointEnum target; in GenCmpFP() local
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/art/compiler/dex/quick/x86/ |
D | quick_assemble_x86_test.cc | 32 X86Mir2Lir* Prepare(InstructionSet target) { in Prepare() 116 bool CheckTools(InstructionSet target) { in CheckTools() 137 void Test(InstructionSet target, std::string test_name, std::string gcc_asm, in Test() 195 void TestVectorFn(InstructionSet target, in TestVectorFn()
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D | assemble_x86.cc | 1659 CodeOffset target = target_lir->offset; in AssembleInstructions() local 1686 CodeOffset target = target_lir->offset; in AssembleInstructions() local 1703 CodeOffset target = target_lir->offset; in AssembleInstructions() local 1719 CodeOffset target = target_lir->offset; in AssembleInstructions() local 1745 CodeOffset target = target_lir->offset; in AssembleInstructions() local 1754 CodeOffset target = target_lir->offset; in AssembleInstructions() local 1774 CodeOffset target = tab_rec->offset; in AssembleInstructions() local
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D | utility_x86.cc | 113 LIR* X86Mir2Lir::OpUnconditionalBranch(LIR* target) { in OpUnconditionalBranch() 119 LIR* X86Mir2Lir::OpCondBranch(ConditionCode cc, LIR* target) { in OpCondBranch() 946 int offset, int check_value, LIR* target, LIR** compare) { in OpCmpMemImmBranch()
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/art/tools/dexfuzz/src/dexfuzz/program/ |
D | MBranchInsn.java | 26 public MInsn target; field in MBranchInsn
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D | CodeTranslator.java | 177 MInsn target = ((MInsnWithData) mInsn).dataTarget; in mutatableCodeToCodeItem() local 182 MInsn target = ((MBranchInsn) mInsn).target; in mutatableCodeToCodeItem() local
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/art/tools/dexfuzz/src/dexfuzz/rawdex/formats/ |
D | ContainsTarget.java | 28 public void setTarget(Instruction insn, long target); in setTarget()
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D | Format10t.java | 53 public void setTarget(Instruction insn, long target) { in setTarget()
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D | Format20t.java | 54 public void setTarget(Instruction insn, long target) { in setTarget()
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D | Format30t.java | 54 public void setTarget(Instruction insn, long target) { in setTarget()
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D | Format21t.java | 54 public void setTarget(Instruction insn, long target) { in setTarget()
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D | Format22t.java | 54 public void setTarget(Instruction insn, long target) { in setTarget()
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D | Format31t.java | 54 public void setTarget(Instruction insn, long target) { in setTarget()
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/art/compiler/dex/quick/ |
D | gen_common.cc | 142 LIR* target = GenerateTargetLabel(); in GenGetOtherTypeForSgetSput() local 530 QuickEntrypointEnum target; in GenFilledNewArray() local 732 QuickEntrypointEnum target; in GenSput() local 809 QuickEntrypointEnum target; in GenSget() local 896 QuickEntrypointEnum target; in GenIGet() local 977 QuickEntrypointEnum target; in GenIPut() local 1013 QuickEntrypointEnum target = needs_range_check in GenArrayObjPut() local 1203 LIR* target = NewLIR0(kPseudoTargetLabel); in GenInstanceofFinal() local 1309 LIR* target = NewLIR0(kPseudoTargetLabel); in GenInstanceofCallingHelper() local 1491 QuickEntrypointEnum target; in GenShiftOpLong() local [all …]
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D | codegen_util.cc | 340 LIR* target = NewLIR0(kPseudoTargetLabel); in MarkGCCard() local 566 int target = successor_block_info->block; in InstallSwitchTables() local 591 int target = successor_block_info->block; in InstallSwitchTables() local 1258 int offset, int check_value, LIR* target, LIR** compare) { in OpCmpMemImmBranch()
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/art/compiler/dex/quick/arm64/ |
D | assemble_arm64.cc | 909 CodeOffset target = target_lir->offset + in AssembleLIR() local 933 CodeOffset target = target_lir->offset + in AssembleLIR() local 965 CodeOffset target = target_lir->offset + in AssembleLIR() local
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/art/runtime/base/unix_file/ |
D | fd_file.cc | 59 void FdFile::moveTo(GuardState target, GuardState warn_threshold, const char* warning) { in moveTo() 70 void FdFile::moveUp(GuardState target, const char* warning) { in moveUp()
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/art/test/046-reflect/src/ |
D | Main.java | 65 Class target = Target.class; in showStrings() local 83 Class target = otherpackage.Other.class; in checkAccess() local 124 Class target = Target.class; in run() local
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/art/disassembler/ |
D | disassembler_mips.cc | 388 uint32_t target = (instr_index << 2); in Dump() local
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