| /art/compiler/optimizing/ |
| D | locations.h | 138 bool IsRegister() const { in IsRegister() function
155 return IsRegister() || IsFpuRegister() || IsRegisterPair() || IsFpuRegisterPair(); in IsRegisterKind()
159 DCHECK(IsRegister() || IsFpuRegister()); in reg()
175 DCHECK(IsRegister()); in AsRegister()
413 if (loc.IsRegister()) { in Add()
422 if (loc.IsRegister()) { in Remove()
579 return input.IsRegister() in IsFixedInput()
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| D | code_generator_x86_64.cc | 212 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
620 if (destination.IsRegister()) { in Move()
621 if (source.IsRegister()) { in Move()
634 if (source.IsRegister()) { in Move()
647 if (source.IsRegister()) { in Move()
664 if (source.IsRegister()) { in Move()
701 if (location.IsRegister()) { in Move()
711 if (location.IsRegister()) { in Move()
827 if (lhs.IsRegister()) { in GenerateTestAndBranch()
840 if (rhs.IsRegister()) { in GenerateTestAndBranch()
[all …]
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| D | common_arm64.h | 55 DCHECK(location.IsRegister()); in XRegisterFrom()
60 DCHECK(location.IsRegister()); in WRegisterFrom()
132 if (location.IsRegister()) { in OperandFrom()
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| D | code_generator_x86.cc | 222 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
619 if (destination.IsRegister()) { in Move32()
620 if (source.IsRegister()) { in Move32()
629 if (source.IsRegister()) { in Move32()
639 if (source.IsRegister()) { in Move32()
728 if (location.IsRegister()) { in Move()
864 if (lhs.IsRegister()) { in GenerateTestAndBranch()
878 if (rhs.IsRegister()) { in GenerateTestAndBranch()
1005 if (rhs.IsRegister()) { in VisitCondition()
1372 DCHECK(in.IsRegister()); in VisitNeg()
[all …]
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| D | locations.cc | 74 if (location.IsRegister() || location.IsFpuRegister()) { in operator <<()
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| D | code_generator_arm.cc | 191 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
715 if (destination.IsRegister()) { in Move32()
716 if (source.IsRegister()) { in Move32()
724 if (source.IsRegister()) { in Move32()
733 if (source.IsRegister()) { in Move32()
813 if (location.IsRegister()) { in Move()
955 DCHECK(instruction->GetLocations()->InAt(0).IsRegister()); in GenerateTestAndBranch()
963 DCHECK(locations->InAt(0).IsRegister()) << locations->InAt(0); in GenerateTestAndBranch()
965 if (locations->InAt(1).IsRegister()) { in GenerateTestAndBranch()
1045 if (locations->InAt(1).IsRegister()) { in VisitCondition()
[all …]
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| D | register_allocator.cc | 131 DCHECK(location.IsRegister() || location.IsFpuRegister()); in BlockRegister()
132 LiveInterval* interval = location.IsRegister() in BlockRegister()
135 Primitive::Type type = location.IsRegister() in BlockRegister()
140 if (location.IsRegister()) { in BlockRegister()
210 if (temp.IsRegister() || temp.IsFpuRegister()) { in ProcessInstruction()
295 if (input.IsRegister() || input.IsFpuRegister()) { in ProcessInstruction()
350 if (first.IsRegister() || first.IsFpuRegister()) { in ProcessInstruction()
360 } else if (output.IsRegister() || output.IsFpuRegister()) { in ProcessInstruction()
1287 return destination.IsRegister() in IsValidDestination()
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| D | code_generator_mips64.cc | 195 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
605 if (destination.IsRegister() || destination.IsFpuRegister()) { in MoveLocation()
613 type = destination.IsRegister() ? Primitive::kPrimInt : Primitive::kPrimFloat; in MoveLocation()
619 type = destination.IsRegister() ? Primitive::kPrimLong : Primitive::kPrimDouble; in MoveLocation()
623 (destination.IsRegister() && !Primitive::IsFloatingPointType(type))); in MoveLocation()
656 if (destination.IsRegister()) { in MoveLocation()
671 if (source.IsRegister() || source.IsFpuRegister()) { in MoveLocation()
673 if (source.IsRegister()) { in MoveLocation()
683 if (source.IsRegister()) { in MoveLocation()
734 if (loc2.IsRegister() && loc1.IsRegister()) { in SwapLocations()
[all …]
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| D | code_generator_arm64.cc | 187 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
468 if (loc.IsRegister()) { in FreeScratchLocation()
550 if (location.IsRegister()) { in Move()
738 if (destination.IsRegister() || destination.IsFpuRegister()) { in MoveLocation()
746 type = destination.IsRegister() ? Primitive::kPrimInt : Primitive::kPrimFloat; in MoveLocation()
752 type = destination.IsRegister() ? Primitive::kPrimLong : Primitive::kPrimDouble; in MoveLocation()
756 (destination.IsRegister() && !Primitive::IsFloatingPointType(type))); in MoveLocation()
765 if (destination.IsRegister()) { in MoveLocation()
774 if (source.IsRegister() || source.IsFpuRegister()) { in MoveLocation()
776 if (source.IsRegister()) { in MoveLocation()
[all …]
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| D | graph_visualizer.cc | 129 if (location.IsRegister()) { in DumpLocation()
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| D | ssa_liveness_analysis.h | 925 && (locations->InAt(0).IsRegister() in DefinitionRequiresRegister()
936 } else if (location.IsRegister() || location.IsRegisterPair()) { in DefinitionRequiresRegister()
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| D | code_generator.cc | 45 } else if (location.IsRegister() || in CheckType()
295 if (location.IsRegister()) { in BlockIfInRegister()
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| D | ssa_liveness_analysis.cc | 467 return other.IsRegister(); in SameRegisterKind()
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| D | parallel_move_test.cc | 43 } else if (location.IsRegister()) { in DumpLocationForTest()
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| D | intrinsics_x86_64.cc | 142 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory. in EmitNativeCode()
618 DCHECK(out.IsRegister()); in InvokeOutOfLineIntrinsic()
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| D | intrinsics_x86.cc | 151 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory. in EmitNativeCode()
741 DCHECK(out.IsRegister()); in InvokeOutOfLineIntrinsic()
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| D | intrinsics_arm.cc | 114 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory. in EmitNativeCode()
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| D | intrinsics_arm64.cc | 123 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory. in EmitNativeCode()
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| /art/disassembler/ |
| D | disassembler_arm64.cc | 46 if (reg.IsRegister() && reg.Is64Bits()) { in AppendRegisterNameToOutput()
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| /art/compiler/utils/arm/ |
| D | assembler_thumb2.cc | 739 if (so.IsRegister() && IsHighRegister(so.GetRegister()) && !can_contain_high_register) { in Is32BitDataProcessing()
744 if (opcode == MOV && so.IsRegister() && so.IsShift() && so.GetShift() == ROR) { in Is32BitDataProcessing()
766 if (so.IsRegister() && rd != rn) { in Is32BitDataProcessing()
872 } else if (so.IsRegister()) { in Emit32BitDataProcessing()
905 if (opcode == MOV && so.IsRegister() && so.IsShift()) { in Emit16BitDataProcessing()
936 CHECK(!(so.IsRegister() && so.IsShift() && so.GetSecondRegister() != kNoRegister)) in Emit16BitDataProcessing()
1071 if (so.IsRegister()) { in Emit16BitAddSub()
1135 if (so.IsRegister()) { in Emit16BitAddSub()
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| D | assembler_arm32_test.cc | 260 } else if (sop.IsRegister()) { in GetShiftString()
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| D | assembler_arm.h | 83 bool IsRegister() const { in IsRegister() function
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| /art/compiler/utils/x86/ |
| D | assembler_x86.h | 82 bool IsRegister(Register reg) const { in IsRegister() function
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| D | assembler_x86.cc | 1649 } else if (operand.IsRegister(EAX)) { in EmitComplex()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 95 bool IsRegister(CpuRegister reg) const { in IsRegister() function
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