/art/compiler/dex/quick/mips/ |
D | call_mips.cc | 444 cg->LoadConstantWide(cg->TargetPtrReg(kInvokeTgt), direct_code); in NextSDCallInsn() 453 cg->LoadConstantWide(cg->TargetReg(kArg0, kRef), direct_method); in NextSDCallInsn() 480 cg->LoadConstantWide(cg->TargetPtrReg(kInvokeTgt), direct_code); in NextSDCallInsn()
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D | utility_mips.cc | 455 res = LoadConstantWide(r_scratch, value); in OpRegRegImm() 542 LIR* MipsMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::MipsMir2Lir
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D | codegen_mips.h | 89 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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/art/compiler/dex/quick/arm/ |
D | fp_arm.cc | 135 LoadConstantWide(r_tmp, constant); in GenMultiplyByConstantDouble() 182 LoadConstantWide(tmp2, 0x41f0000000000000LL); in GenConversion() 208 LoadConstantWide(const_val, INT64_C(0x41f0000000000000)); in GenConversion()
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D | codegen_arm.h | 76 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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D | utility_arm.cc | 697 LIR* ArmMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::ArmMir2Lir
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/art/compiler/dex/quick/x86/ |
D | fp_x86.cc | 299 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff); in GenConversion() 325 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff); in GenConversion() 691 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff); in GenInlinedAbsDouble() 695 LoadConstantWide(sign_mask, 0x7fffffffffffffff); in GenInlinedAbsDouble() 759 LoadConstantWide(rl_result.reg, INT64_C(0x7ff8000000000000)); in GenInlinedMinMaxFP()
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D | int_x86.cc | 467 LoadConstantWide(tmp, val); in GenFusedLongCmpImmBranch() 505 LoadConstantWide(tmp, val); in GenFusedLongCmpImmBranch() 1294 LoadConstantWide(r_value, value); in SwapBits64() 2158 LoadConstantWide(rl_result.reg, 0); in GenDivRemLongLit() 2168 LoadConstantWide(rs_temp, 0x8000000000000000); in GenDivRemLongLit() 2183 LoadConstantWide(rl_result.reg, 0); in GenDivRemLongLit() 2194 LoadConstantWide(rl_result.reg, std::abs(imm) - 1); in GenDivRemLongLit() 2240 LoadConstantWide(rs_r0q, magic); in GenDivRemLongLit() 2303 LoadConstantWide(rs_temp, imm); in GenDivRemLongLit() 2365 LoadConstantWide(rs_r6q, 0x8000000000000000); in GenDivRemLong()
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D | call_x86.cc | 366 cg->LoadConstantWide(target_reg, direct_method); in X86NextSDCallInsn()
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D | utility_x86.cc | 567 LIR* X86Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::X86Mir2Lir 621 res = LoadConstantWide(r_temp, value); in LoadConstantWide()
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D | codegen_x86.h | 97 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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/art/compiler/dex/quick/arm64/ |
D | call_arm64.cc | 485 cg->LoadConstantWide(cg->TargetPtrReg(kInvokeTgt), direct_code); in Arm64NextSDCallInsn() 492 cg->LoadConstantWide(cg->TargetReg(kArg0, kRef), direct_method); in Arm64NextSDCallInsn() 522 cg->LoadConstantWide(cg->TargetPtrReg(kInvokeTgt), direct_code); in Arm64NextSDCallInsn()
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D | utility_arm64.cc | 402 return LoadConstantWide(r_dest, value); in LoadConstantNoClobber() 458 LIR* Arm64Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::Arm64Mir2Lir 922 LoadConstantWide(r_scratch, value); in OpRegRegImm64() 970 res = LoadConstantWide(r_tmp, value); in OpRegImm64() 1257 LoadConstantWide(r_scratch, displacement); in LoadBaseDispBody() 1347 LoadConstantWide(r_scratch, displacement); in StoreBaseDispBody()
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D | fp_arm64.cc | 137 LoadConstantWide(r_tmp, constant); in GenMultiplyByConstantDouble()
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D | codegen_arm64.h | 72 LIR* LoadConstantWide(RegStorage r_dest, int64_t value) OVERRIDE;
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D | int_arm64.cc | 503 LoadConstantWide(r_magic, magic_table[lit].magic64); in SmallLiteralDivRem64()
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/art/compiler/dex/quick/ |
D | gen_loadstore.cc | 89 LoadConstantWide(r_dest, mir_graph_->ConstantValueWide(rl_src)); in LoadValueDirectWide()
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D | mir_to_lir.cc | 603 LoadConstantWide(rl_result.reg, static_cast<int64_t>(vB) << 48); in CompileDalvikInstruction()
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D | mir_to_lir.h | 1156 virtual LIR* LoadConstantWide(RegStorage r_dest, int64_t value) = 0;
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D | gen_common.cc | 2155 LoadConstantWide(rl_result.reg, value); in GenConstWide()
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