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Searched refs:OpRegRegReg (Results 1 – 19 of 19) sorted by relevance

/art/compiler/dex/quick/mips/
Dint_mips.cc434 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, t_reg); in GenMultiplyByTwoBitMultiplier()
447 OpRegRegReg(kOpOr, t_reg, reg.GetLow(), reg.GetHigh()); in GenDivZeroCheckWide()
501 OpRegRegReg(kOpAdd, rl_result.reg.GetLow(), rl_src2.reg.GetLow(), rl_src1.reg.GetLow()); in GenAddLong()
503 OpRegRegReg(kOpAdd, t_reg, rl_src2.reg.GetHigh(), rl_src1.reg.GetHigh()); in GenAddLong()
506 OpRegRegReg(kOpAdd, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), t_reg); in GenAddLong()
525 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenSubLong()
526 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenSubLong()
527 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), t_reg); in GenSubLong()
605 OpRegRegReg(op, rl_result.reg, rl_src1.reg, rl_src2.reg); in GenLongOp()
658 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), t_reg); in GenNegLong()
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Dcall_mips.cc110 OpRegRegReg(kOpAdd, r_end, r_end, r_base); in GenLargeSparseSwitch()
125 OpRegRegReg(kOpAdd, rs_ra, rs_ra, r_disp); in GenLargeSparseSwitch()
181 OpRegRegReg(kOpSub, r_key, rl_src.reg, r_key); in GenLargePackedSwitch()
206 OpRegRegReg(kOpAdd, rs_ra, rs_ra, r_disp); in GenLargePackedSwitch()
Dutility_mips.cc304 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() function in art::MipsMir2Lir
487 return OpRegRegReg(op, r_dest_src1, r_dest_src1, r_src2); in OpRegReg()
Dcodegen_mips.h214 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
/art/compiler/dex/quick/arm/
Dint_arm.cc143 OpRegRegReg(kOpSub, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenCmpLong()
227 OpRegRegReg(kOpSub, rs_dest, left_op, right_op); in GenSelectConst32()
572 OpRegRegReg(kOpSub, rl_result.reg, rl_src.reg, tmp1); in SmallLiteralDivRem()
748 OpRegRegReg(kOpDiv, rl_result.reg, reg1, reg2); in GenDivRem()
756 OpRegRegReg(kOpDiv, temp, reg1, reg2); in GenDivRem()
758 OpRegRegReg(kOpSub, rl_result.reg, reg1, temp); in GenDivRem()
903 OpRegRegReg(kOpAdd, r_ptr, rl_object.reg, rl_offset.reg); in GenInlinedCas()
1233 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), z_reg, rl_src.reg.GetLow()); in GenNegLong()
1234 OpRegRegReg(kOpSbc, rl_result.reg.GetHigh(), z_reg, t_reg); in GenNegLong()
1237 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), z_reg, rl_src.reg.GetLow()); in GenNegLong()
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Dcall_arm.cc171 OpRegRegReg(kOpOr, rs_r2, rs_r2, rs_r1); in GenMonitorEnter()
204 OpRegRegReg(kOpOr, rs_r2, rs_r2, rs_r1); in GenMonitorEnter()
Dutility_arm.cc509 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() function in art::ArmMir2Lir
781 OpRegRegReg(kOpAdd, reg_ptr, r_base, r_index); in LoadBaseIndexed()
848 OpRegRegReg(kOpAdd, reg_ptr, r_base, r_index); in StoreBaseIndexed()
Dcodegen_arm.h217 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
/art/compiler/dex/quick/
Dgen_common.cc1465 OpRegRegReg(first_op, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenLong3Addr()
1466 OpRegRegReg(second_op, rl_result.reg.GetHigh(), rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenLong3Addr()
1470 OpRegRegReg(first_op, rl_result.reg.GetLow(), rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenLong3Addr()
1471 OpRegRegReg(second_op, rl_result.reg.GetHigh(), rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenLong3Addr()
1601 OpRegRegReg(op, rl_result.reg, rl_src1.reg, t_reg); in GenArithOpInt()
1607 OpRegRegReg(op, rl_result.reg, rl_src1.reg, rl_src2.reg); in GenArithOpInt()
1688 OpRegRegReg(kOpAdd, t_reg, t_reg, rl_src.reg); in HandleEasyDivRem()
1693 OpRegRegReg(kOpAdd, t_reg, t_reg, rl_src.reg); in HandleEasyDivRem()
1701 OpRegRegReg(kOpAdd, t_reg2, t_reg1, rl_src.reg); in HandleEasyDivRem()
1703 OpRegRegReg(kOpSub, rl_result.reg, t_reg2, t_reg1); in HandleEasyDivRem()
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Dgen_invoke.cc960 LIR* or_inst = OpRegRegReg(kOpOr, reg_slow_path, reg_slow_path, reg_disabled); in GenInlinedReferenceGetReferent()
1100 OpRegRegReg(kOpAdc, rl_result.reg, rl_result.reg, t_reg); in GenInlinedStringIsEmptyOrLength()
1218 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, sign_reg); in GenInlinedAbsInt()
1254 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, sign_reg); in GenInlinedAbsLong()
1259 OpRegRegReg(kOpAdd, rl_result.reg.GetLow(), rl_src.reg.GetLow(), sign_reg); in GenInlinedAbsLong()
1260 OpRegRegReg(kOpAdc, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), sign_reg); in GenInlinedAbsLong()
1462 OpRegRegReg(kOpAdd, rl_temp_offset, rl_object.reg, rl_offset.reg); in GenInlinedUnsafeGet()
1510 OpRegRegReg(kOpAdd, rl_temp_offset, rl_object.reg, rl_offset.reg); in GenInlinedUnsafePut()
Dmir_to_lir.h1456 virtual LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1,
/art/compiler/dex/quick/x86/
Dint_x86.cc490 OpRegRegReg(kOpOr, t_reg, low_reg, high_reg); in GenFusedLongCmpImmBranch()
1470 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, t_reg); in GenMultiplyByTwoBitMultiplier()
1488 OpRegRegReg(kOpOr, t_reg, reg.GetLow(), reg.GetHigh()); in GenDivZeroCheckWide()
3221 OpRegRegReg(op, rl_result.reg, rl_lhs.reg, t_reg); in GenArithOpInt()
3260 OpRegRegReg(op, rl_result.reg, rl_lhs.reg, rl_rhs.reg); in GenArithOpInt()
3272 OpRegRegReg(op, rl_result.reg, rl_lhs.reg, rl_rhs.reg); in GenArithOpInt()
3303 OpRegRegReg(op, rl_result.reg, rl_lhs.reg, rl_rhs.reg); in GenArithOpInt()
3310 OpRegRegReg(op, rl_result.reg, rl_lhs.reg, rl_rhs.reg); in GenArithOpInt()
3471 OpRegRegReg(op, rl_result.reg, rl_src1.reg, t_reg); in GenShiftOpLong()
Dcodegen_x86.h313 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
Dtarget_x86.cc1155 OpRegRegReg(kOpSub, tmp_reg, rs_rAX, tmp_reg); in GenInlinedArrayCopyCharArray()
1180 OpRegRegReg(kOpSub, tmp_reg, rs_rAX, tmp_reg); in GenInlinedArrayCopyCharArray()
Dutility_x86.cc451 LIR* X86Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegReg() function in art::X86Mir2Lir
/art/compiler/dex/quick/arm64/
Dint_arm64.cc93 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg)); in GenShiftOpLong()
516 OpRegRegReg(kOpAdd, r_long_mul, rl_src.reg, r_long_mul); in SmallLiteralDivRem64()
642 OpRegRegReg(kOpDiv, rl_result.reg, r_src1, r_src2); in GenDivRem()
655 OpRegRegReg(kOpDiv, temp, r_src1, r_src2); in GenDivRem()
771 OpRegRegReg(kOpAdd, r_ptr, rl_object.reg, rl_offset.reg); in GenInlinedCas()
Dcall_arm64.cc182 OpRegRegReg(kOpOr, rs_w1, rs_w1, rs_w3); in GenMonitorEnter()
Dcodegen_arm64.h220 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
Dutility_arm64.cc801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() function in art::Arm64Mir2Lir