Searched refs:Restore (Results 1 – 19 of 19) sorted by relevance
| /art/compiler/dwarf/ |
| D | dwarf_test.cc | 95 opcodes.Restore(Reg(0x3F)); in TEST_F()
97 opcodes.Restore(Reg(0x40)); in TEST_F()
99 opcodes.Restore(reg); in TEST_F()
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| D | debug_frame_opcode_writer.h | 104 Restore(Reg(reg_base.num() + i)); in RestoreMany()
137 void ALWAYS_INLINE Restore(Reg reg) { in Restore() function
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| /art/runtime/arch/mips64/ |
| D | jni_entrypoints_mips64.S | 49 .cpreturn # Restore gp from t8 in branch delay slot. gp is not used
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| D | quick_entrypoints_mips64.S | 146 ld $t8, 56($sp) # Restore gp back to it's temp storage.
275 ld $t8, 184($sp) # Restore gp back to it's temp storage.
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| /art/compiler/dex/quick/x86/ |
| D | call_x86.cc | 323 cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rSI.GetRegNum())); in GenSpecialExitForSuspend()
326 cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rDI.GetRegNum())); in GenSpecialExitForSuspend()
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| D | target_x86.cc | 769 cfi_.Restore(DwarfCoreReg(cu_->target64, reg)); in UnSpillCoreRegs()
803 cfi_.Restore(DwarfFpReg(cu_->target64, reg)); in UnSpillFPRegs()
1422 cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rDI.GetReg())); in GenInlinedIndexOf()
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| D | int_x86.cc | 972 cfi_.Restore(DwarfCoreReg(cu_->target64, tmp.GetReg())); in GenInlinedMinMax()
1212 cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rSI.GetRegNum())); in GenInlinedCas()
1221 cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rDI.GetRegNum())); in GenInlinedCas()
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| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 1697 m2l->cfi().Restore(DwarfCoreReg(reg1)); in UnSpillCoreRegs()
1702 m2l->cfi().Restore(DwarfCoreReg(reg2)); in UnSpillCoreRegs()
1703 m2l->cfi().Restore(DwarfCoreReg(reg1)); in UnSpillCoreRegs()
1717 m2l->cfi().Restore(DwarfFpReg(reg1)); in UnSpillFPRegs()
1721 m2l->cfi().Restore(DwarfFpReg(reg2)); in UnSpillFPRegs()
1722 m2l->cfi().Restore(DwarfFpReg(reg1)); in UnSpillFPRegs()
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| D | call_arm64.cc | 445 cfi_.Restore(DwarfCoreReg(rxLR)); in GenSpecialExitForSuspend()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 678 cfi_.Restore(DWARFReg(dst0)); in UnspillRegisters()
679 cfi_.Restore(DWARFReg(dst1)); in UnspillRegisters()
685 cfi_.Restore(DWARFReg(dst0)); in UnspillRegisters()
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| /art/compiler/dex/quick/mips/ |
| D | call_mips.cc | 409 cfi_.Restore(DwarfCoreReg(rRA)); in GenSpecialExitForSuspend()
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| D | target_mips.cc | 877 cfi_.Restore(DwarfCoreReg(reg)); in UnSpillCoreRegs()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 585 cfi_.Restore(DWARFReg(reg)); in RemoveFrame()
589 cfi_.Restore(DWARFReg(RA)); in RemoveFrame()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 1124 cfi_.Restore(DWARFReg(reg)); in RemoveFrame()
1128 cfi_.Restore(DWARFReg(RA)); in RemoveFrame()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 2428 cfi_.Restore(DWARFReg(spill.AsXmmRegister().AsFloatRegister())); in RemoveFrame()
2441 cfi_.Restore(DWARFReg(spill.AsCpuRegister().AsRegister())); in RemoveFrame()
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| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 1764 cfi_.Restore(DWARFReg(spill)); in RemoveFrame()
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 561 __ cfi().Restore(DWARFReg(kFpuCalleeSaves[i])); in GenerateFrameExit()
574 __ cfi().Restore(DWARFReg(reg)); in GenerateFrameExit()
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| D | code_generator_mips64.cc | 574 __ cfi().Restore(DWARFReg(reg)); in GenerateFrameExit()
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| D | code_generator_x86.cc | 516 __ cfi().Restore(DWARFReg(reg)); in GenerateFrameExit()
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