/art/disassembler/ |
D | disassembler_arm64.cc | 34 TR = 18, enumerator 47 if (reg.code() == TR) { in AppendRegisterNameToOutput() 94 if (instr->Rn() == TR) { in VisitLoadStoreUnsignedOffset()
|
D | disassembler_arm.cc | 1390 if (Rn.r == TR && is_load) { in DumpThumb32()
|
/art/cmdline/detail/ |
D | cmdline_parser_detail.h | 54 template <typename TL, typename TR> 55 static std::true_type EqualityOperatorTest(const TL& left, const TR& right,
|
/art/compiler/utils/arm/ |
D | assembler_arm.cc | 569 StoreToOffset(kStoreWord, scratch.AsCoreRegister(), TR, dest.Int32Value()); in StoreImmediateToThread32() 597 return EmitLoad(this, m_dst, TR, src.Int32Value(), size); in LoadFromThread32() 603 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), TR, offs.Int32Value()); in LoadRawPtrFromThread32() 612 TR, thr_offs.Int32Value()); in CopyRawPtrFromThread32() 625 TR, thr_offs.Int32Value()); in CopyRawPtrToThread32() 635 TR, thr_offs.Int32Value()); in StoreStackOffsetToThread32() 639 StoreToOffset(kStoreWord, SP, TR, thr_offs.Int32Value()); in StoreStackPointerToThread32() 832 mov(tr.AsArm().AsCoreRegister(), ShifterOperand(TR)); in GetCurrentThread() 837 StoreToOffset(kStoreWord, TR, SP, offset.Int32Value(), AL); in GetCurrentThread() 845 TR, Thread::ExceptionOffset<4>().Int32Value()); in ExceptionPoll() [all …]
|
/art/runtime/arch/arm/ |
D | registers_arm.h | 43 TR = 9, // thread register enumerator
|
D | context_arm.cc | 110 DCHECK_EQ(reinterpret_cast<uintptr_t>(Thread::Current()), gprs[TR]); in DoLongJump()
|
/art/runtime/arch/arm64/ |
D | registers_arm64.h | 63 TR = X18, // ART Thread Register - Managed Runtime (Caller Saved Reg) enumerator
|
D | context_arm64.cc | 138 DCHECK_EQ(reinterpret_cast<uintptr_t>(Thread::Current()), gprs[TR]); in DoLongJump()
|
/art/compiler/utils/arm64/ |
D | assembler_arm64.cc | 636 ___ Mov(reg_x(TR), reg_x(ETR)); in EmitExceptionPoll() 720 DCHECK(!core_reg_list.IncludesAliasOf(reg_x(TR))); in BuildFrame() 722 ___ Mov(reg_x(ETR), reg_x(TR)); in BuildFrame() 776 DCHECK(!core_reg_list.IncludesAliasOf(reg_x(TR))); in RemoveFrame() 778 ___ Mov(reg_x(TR), reg_x(ETR)); in RemoveFrame()
|
D | managed_register_arm64_test.cc | 626 EXPECT_TRUE(vixl::x18.Is(Arm64Assembler::reg_x(TR))); in TEST()
|
/art/compiler/optimizing/ |
D | intrinsics_arm.cc | 477 TR, in VisitThreadCurrentThread() 848 kLoadWord, LR, TR, QUICK_ENTRYPOINT_OFFSET(kArmWordSize, pStringCompareTo).Int32Value()); in VisitStringCompareTo() 893 __ LoadFromOffset(kLoadWord, LR, TR, in GenerateVisitStringIndexOf() 964 kLoadWord, LR, TR, QUICK_ENTRYPOINT_OFFSET(kArmWordSize, pAllocStringFromBytes).Int32Value()); in VisitStringNewStringFromBytes() 985 kLoadWord, LR, TR, QUICK_ENTRYPOINT_OFFSET(kArmWordSize, pAllocStringFromChars).Int32Value()); in VisitStringNewStringFromChars() 1010 LR, TR, QUICK_ENTRYPOINT_OFFSET(kArmWordSize, pAllocStringFromString).Int32Value()); in VisitStringNewStringFromString()
|
D | code_generator_mips64.cc | 43 static constexpr GpuRegister TR = S1; variable 865 TR, in MarkGCCard() 890 blocked_core_registers_[TR] = true; in SetupBlockedRegisters() 960 __ LoadFromOffset(kLoadDoubleword, T9, TR, entry_point_offset); in InvokeRuntime() 991 TR, in GenerateSuspendCheck() 2392 TR, in GenerateStaticOrDirectCall() 2520 …__ LoadFromOffset(kLoadUnsignedWord, out, TR, Thread::ExceptionOffset<kMips64WordSize>().Int32Valu… in VisitLoadException() 2521 __ StoreToOffset(kStoreWord, ZERO, TR, Thread::ExceptionOffset<kMips64WordSize>().Int32Value()); in VisitLoadException()
|
D | code_generator_arm.cc | 460 blocked_core_registers_[TR] = true; in SetupBlockedRegisters() 891 __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset); in InvokeRuntime() 3498 __ LoadFromOffset(kLoadWord, card, TR, Thread::CardTableOffset<kArmWordSize>().Int32Value()); in MarkGCCard() 3557 kLoadUnsignedHalfword, IP, TR, Thread::ThreadFlagsOffset<kArmWordSize>().Int32Value()); in GenerateSuspendCheck() 3880 __ LoadFromOffset(kLoadWord, out, TR, offset); in VisitLoadException() 3882 __ StoreToOffset(kStoreWord, IP, TR, offset); in VisitLoadException() 4083 __ LoadFromOffset(kLoadWord, temp, TR, invoke->GetStringInitOffset()); in GenerateStaticOrDirectCall()
|
/art/compiler/dex/quick/x86/ |
D | x86_lir.h | 380 opcode ## 8MR, opcode ## 8AR, opcode ## 8TR, \ 383 opcode ## 16MR, opcode ## 16AR, opcode ## 16TR, \ 387 opcode ## 32MR, opcode ## 32AR, opcode ## 32TR, \ 391 opcode ## 64MR, opcode ## 64AR, opcode ## 64TR, \
|
D | assemble_x86.cc | 45 { kX86 ## opname ## 8TR, kThreadReg, mem_use | IS_BINARY_OP | REG_USE1 | SETS_CCODES … 57 { kX86 ## opname ## 16TR, kThreadReg, mem_use | IS_BINARY_OP | REG_USE1 | SETS_CCODE… 73 { kX86 ## opname ## 32TR, kThreadReg, mem_use | IS_BINARY_OP | REG_USE1 | SETS_CCODE… 89 { kX86 ## opname ## 64TR, kThreadReg, mem_use | IS_BINARY_OP | REG_USE1 | SETS_CCODE…
|
/art/compiler/trampolines/ |
D | trampoline_compiler.cc | 79 __ JumpTo(Arm64ManagedRegister::FromXRegister(TR), Offset(offset.Int32Value()), in CreateTrampoline()
|