/art/compiler/dex/quick/ |
D | mir_to_lir-inl.h | 62 insn->u.m.use_mask = insn->u.m.def_mask = &kEncodeAll; in RawLIR() 169 lir->u.m.use_mask = lir->u.m.def_mask = &kEncodeNone; in SetupResourceMasks() 189 ResourceMask def_mask; in SetupResourceMasks() local 202 def_mask.SetBit(mem_ref_type_); in SetupResourceMasks() 211 lir->u.m.def_mask = lir->u.m.use_mask = &kEncodeAll; in SetupResourceMasks() 216 SetupRegMask(&def_mask, lir->operands[0]); in SetupResourceMasks() 220 SetupRegMask(&def_mask, lir->operands[1]); in SetupResourceMasks() 224 SetupRegMask(&def_mask, lir->operands[2]); in SetupResourceMasks() 248 def_mask.SetBit(ResourceMask::kCCode); in SetupResourceMasks() 256 SetupTargetResourceMasks(lir, flags, &use_mask, &def_mask); in SetupResourceMasks() [all …]
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D | local_optimizations.cc | 25 #define LOAD_STORE_CHECK_REG_DEP(mask, check) (mask.Intersects(*check->u.m.def_mask)) 29 (use.Union(def).Intersects(*check->u.m.def_mask)) 179 *this_lir->u.m.def_mask)); in ApplyLoadStoreElimination() 188 if (this_lir->u.m.def_mask->Intersects(*this_lir->u.m.use_mask)) { in ApplyLoadStoreElimination() 192 ResourceMask stop_def_reg_mask = this_lir->u.m.def_mask->Without(kEncodeMem); in ApplyLoadStoreElimination() 197 if (uses_pc.Intersects(this_lir->u.m.use_mask->Union(*this_lir->u.m.def_mask))) { in ApplyLoadStoreElimination() 215 if (uses_pc.Intersects(check_lir->u.m.use_mask->Union(*check_lir->u.m.def_mask))) { in ApplyLoadStoreElimination() 220 *check_lir->u.m.def_mask)); in ApplyLoadStoreElimination() 364 ResourceMask stop_def_reg_mask = this_lir->u.m.def_mask->Without(kEncodeMem); in ApplyLoadHoisting() 379 ResourceMask check_mem_mask = check_lir->u.m.def_mask->Intersection(kEncodeMem); in ApplyLoadHoisting() [all …]
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D | codegen_util.cc | 90 inst->u.m.def_mask = &kEncodeAll; in MarkSafepointPC() 92 DCHECK(safepoint_pc->u.m.def_mask->Equals(kEncodeAll)); in MarkSafepointPC() 99 after->u.m.def_mask = &kEncodeAll; in MarkSafepointPCAfter() 108 DCHECK(safepoint_pc->u.m.def_mask->Equals(kEncodeAll)); in MarkSafepointPCAfter() 150 mask_ptr = &lir->u.m.def_mask; in SetMemRefType() 183 DCHECK((is_load ? lir->u.m.use_mask : lir->u.m.def_mask)->Intersection(kEncodeMem).Equals( in AnnotateDalvikRegAccess() 287 if (lir->u.m.def_mask && (!lir->flags.is_nop || dump_nop)) { in DumpLIRInsn() 288 DUMP_RESOURCE_MASK(DumpResourceMask(lir, *lir->u.m.def_mask, "def")); in DumpLIRInsn() 940 new_label->u.m.def_mask = &kEncodeAll; in InsertCaseLabel()
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D | mir_to_lir.h | 160 const ResourceMask* def_mask; // Resource mask for def. member 1261 ResourceMask* use_mask, ResourceMask* def_mask) = 0;
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D | mir_to_lir.cc | 1280 head_lir->u.m.def_mask = &kEncodeAll; in MethodBlockCodeGen()
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D | gen_invoke.cc | 965 if (or_inst->u.m.def_mask->HasBit(ResourceMask::kCCode)) { in GenInlinedReferenceGetReferent()
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D | gen_common.cc | 178 barrier->u.m.def_mask = &kEncodeAll; in GenBarrier()
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/art/compiler/dex/quick/arm/ |
D | target_arm.cc | 164 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument 175 def_mask->SetBit(kArmRegSP); in SetupTargetResourceMasks() 183 def_mask->SetBits(EncodeArmRegList(lir->operands[0])); in SetupTargetResourceMasks() 187 def_mask->SetBits(EncodeArmRegList(lir->operands[1])); in SetupTargetResourceMasks() 191 def_mask->SetBits(EncodeArmRegList(lir->operands[0])); in SetupTargetResourceMasks() 196 SetupRegMask(def_mask, lir->operands[1] + i); in SetupTargetResourceMasks() 206 *def_mask = kEncodeAll; in SetupTargetResourceMasks() 232 } else if ((opcode == kThumbPop) && (def_mask->Intersects(r8Mask))) { in SetupTargetResourceMasks() 233 def_mask->ClearBits(r8Mask); in SetupTargetResourceMasks() 234 def_mask->SetBit(kArmRegPC);; in SetupTargetResourceMasks() [all …]
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D | int_arm.cc | 228 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32() 265 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect() 271 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect() 952 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 959 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 980 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 1185 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch() 1220 barrier->u.m.def_mask = &kEncodeAll; in GenMemBarrier()
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D | codegen_arm.h | 130 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;
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D | call_arm.cc | 96 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenLargeSparseSwitch()
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/art/compiler/dex/quick/mips/ |
D | target_mips.cc | 313 ResourceMask* def_mask) { in SetupTargetResourceMasks() argument 318 def_mask->SetBit(kMipsRegSP); in SetupTargetResourceMasks() 326 def_mask->SetBit(kMipsRegLR); in SetupTargetResourceMasks() 331 def_mask->SetBit(kMipsRegHI); in SetupTargetResourceMasks() 335 def_mask->SetBit(kMipsRegLO); in SetupTargetResourceMasks()
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D | codegen_mips.h | 129 ResourceMask* def_mask) OVERRIDE;
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/art/compiler/dex/quick/x86/ |
D | target_x86.cc | 278 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument 288 def_mask->SetBit(kX86RegSP); in SetupTargetResourceMasks() 292 SetupRegMask(def_mask, rs_rAX.GetReg()); in SetupTargetResourceMasks() 296 SetupRegMask(def_mask, rs_rDX.GetReg()); in SetupTargetResourceMasks() 319 SetupRegMask(def_mask, rs_rDI.GetReg()); in SetupTargetResourceMasks() 324 def_mask->SetBit(kX86FPStack); in SetupTargetResourceMasks() 636 mem_barrier->u.m.def_mask = &kEncodeAll; in GenMemBarrier() 2601 ld1->u.m.def_mask = &kEncodeAll; in GenDalvikArgsBulkCopy() 2612 st1->u.m.def_mask = &kEncodeAll; in GenDalvikArgsBulkCopy()
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D | codegen_x86.h | 162 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;
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D | assemble_x86.cc | 1668 DCHECK(lir->u.m.def_mask->Equals(kEncodeAll)); in AssembleInstructions() 1734 DCHECK(lir->u.m.def_mask->Equals(kEncodeAll)); in AssembleInstructions()
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D | int_x86.cc | 255 DCHECK(!last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32()
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/art/compiler/dex/quick/arm64/ |
D | target_arm64.cc | 169 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument 177 def_mask->SetBit(kA64RegSP); in SetupTargetResourceMasks() 185 def_mask->SetBit(kA64RegLR); in SetupTargetResourceMasks()
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D | int_arm64.cc | 805 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 809 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 1031 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch() 1072 barrier->u.m.def_mask = &kEncodeAll; in GenMemBarrier()
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D | codegen_arm64.h | 118 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;
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