/art/compiler/dex/quick/arm64/ |
D | codegen_arm64.h | 54 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src, 56 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, 58 bool HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div, 167 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div) 169 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) 348 bool is_div, int flags) OVERRIDE; 349 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) OVERRIDE; 352 bool SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src, 398 RegLocation rl_src2, bool is_div, int flags);
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D | int_arm64.cc | 416 bool Arm64Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem() argument 427 if (!is_div) { in SmallLiteralDivRem() 460 bool Arm64Mir2Lir::SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem64() argument 471 if (!is_div) { in SmallLiteralDivRem64() 529 bool Arm64Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem() argument 531 return HandleEasyDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int>(lit)); in HandleEasyDivRem() 536 bool Arm64Mir2Lir::HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem64() argument 546 return SmallLiteralDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, lit); in HandleEasyDivRem64() 548 return SmallLiteralDivRem(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int32_t>(lit)); in HandleEasyDivRem64() 570 if (is_div) { in HandleEasyDivRem64() [all …]
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/art/compiler/dex/quick/mips/ |
D | int_mips.cc | 304 bool is_div) { in GenDivRem() argument 308 NewLIR3(is_div ? kMipsR6Div : kMipsR6Mod, rl_result.reg.GetReg(), reg1.GetReg(), reg2.GetReg()); in GenDivRem() 311 NewLIR1(is_div ? kMipsR2Mflo : kMipsR2Mfhi, rl_result.reg.GetReg()); in GenDivRem() 316 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) { in GenDivRemLit() argument 325 RegLocation rl_result = GenDivRem(rl_dest, reg1, t_reg, is_div); in GenDivRemLit() 331 bool is_div, int flags) { in GenDivRem() argument 332 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags); in GenDivRem() 338 bool is_div) { in GenDivRemLit() argument 339 UNUSED(rl_dest, rl_src1, lit, is_div); in GenDivRemLit() 465 bool MipsMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem() argument [all …]
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D | codegen_mips.h | 73 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src, 169 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div); 170 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div); 241 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, bool is_div, 243 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) OVERRIDE; 280 RegLocation rl_src2, bool is_div, int flags);
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/art/compiler/dex/quick/arm/ |
D | codegen_arm.h | 62 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src, 168 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div); 169 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div); 277 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, 294 bool is_div, int flags) OVERRIDE; 295 … RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) OVERRIDE;
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D | int_arm.cc | 519 bool ArmMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem() argument 539 RegStorage r_div_result = is_div ? rl_result.reg : r_hi; in SmallLiteralDivRem() 561 if (!is_div) { in SmallLiteralDivRem() 716 RegLocation rl_src2, bool is_div, int flags) { in GenDivRem() argument 717 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags); in GenDivRem() 723 bool is_div) { in GenDivRemLit() argument 724 UNUSED(rl_dest, rl_src1, lit, is_div); in GenDivRemLit() 729 RegLocation ArmMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) { in GenDivRemLit() argument 737 rl_result = GenDivRem(rl_result, reg1, lit_temp, is_div); in GenDivRemLit() 744 bool is_div) { in GenDivRem() argument [all …]
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/art/compiler/dex/quick/x86/ |
D | int_x86.cc | 600 RegLocation X86Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) { in GenDivRemLit() argument 601 UNUSED(rl_dest, reg_lo, lit, is_div); in GenDivRemLit() 607 int imm, bool is_div) { in GenDivRemLit() argument 613 if (is_div) { in GenDivRemLit() 622 if (is_div) { in GenDivRemLit() 643 } else if (is_div && IsPowerOfTwo(std::abs(imm))) { in GenDivRemLit() 701 rl_result = {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, is_div ? rs_r2 : rs_r0, in GenDivRemLit() 749 if (!is_div) { in GenDivRemLit() 770 bool is_div) { in GenDivRem() argument 771 UNUSED(rl_dest, reg_lo, reg_hi, is_div); in GenDivRem() [all …]
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D | codegen_x86.h | 83 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src, 259 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div) 261 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) OVERRIDE; 531 void GenDivRemLongLit(RegLocation rl_dest, RegLocation rl_src, int64_t imm, bool is_div); 764 bool is_div, int flags); 773 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src, int lit, bool is_div); 858 RegLocation rl_src2, bool is_div, int flags);
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/art/compiler/dex/quick/ |
D | gen_common.cc | 1671 bool Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode ATTRIBUTE_UNUSED, bool is_div, in HandleEasyDivRem() argument 1683 if (is_div) { in HandleEasyDivRem() 1807 bool is_div = false; in GenArithOpIntLit() local 1900 is_div = true; in GenArithOpIntLit() 1902 is_div = false; in GenArithOpIntLit() 1904 if (HandleEasyDivRem(opcode, is_div, rl_src, rl_dest, lit)) { in GenArithOpIntLit() 1912 rl_result = GenDivRemLit(rl_dest, rl_src.reg, lit, is_div); in GenArithOpIntLit() 1915 rl_result = GenDivRemLit(rl_dest, rl_src, lit, is_div); in GenArithOpIntLit() 1923 rl_result = GenDivRemLit(rl_dest, rl_src.reg, lit, is_div); in GenArithOpIntLit() 1933 if (is_div) in GenArithOpIntLit()
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D | mir_to_lir.h | 792 virtual bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, 1140 virtual bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, 1307 bool is_div) = 0; 1309 bool is_div) = 0; 1320 RegLocation rl_src2, bool is_div, int flags) = 0; 1329 bool is_div) = 0;
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/art/compiler/optimizing/ |
D | builder.h | 154 bool is_div);
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D | code_generator_x86.cc | 80 explicit DivRemMinusOneSlowPathX86(Register reg, bool is_div) : reg_(reg), is_div_(is_div) {} in DivRemMinusOneSlowPathX86() argument 2467 bool is_div = instruction->IsDiv(); in GenerateDivRemIntegral() local 2472 DCHECK_EQ(is_div ? EAX : EDX, out.AsRegister<Register>()); in GenerateDivRemIntegral() 2481 } else if (is_div && IsPowerOfTwo(std::abs(imm))) { in GenerateDivRemIntegral() 2490 is_div); in GenerateDivRemIntegral() 2519 if (is_div) { in GenerateDivRemIntegral() 2524 uint32_t dex_pc = is_div in GenerateDivRemIntegral()
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D | code_generator_x86_64.cc | 85 explicit DivRemMinusOneSlowPathX86_64(Register reg, Primitive::Type type, bool is_div) in DivRemMinusOneSlowPathX86_64() argument 86 : cpu_reg_(CpuRegister(reg)), type_(type), is_div_(is_div) {} in DivRemMinusOneSlowPathX86_64() 2676 bool is_div = instruction->IsDiv(); in GenerateDivRemIntegral() local 2683 DCHECK_EQ(is_div ? RAX : RDX, out.AsRegister()); in GenerateDivRemIntegral() 2701 out.AsRegister(), type, is_div); in GenerateDivRemIntegral()
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