Searched refs:last_lir_insn_ (Results 1 – 13 of 13) sorted by relevance
/art/compiler/dex/quick/ |
D | lazy_debug_frame_opcode_writer.h | 38 advances_.push_back({this->data()->size(), *last_lir_insn_}); in ImplicitlyAdvancePC() 46 last_lir_insn_(last_lir_insn), in LazyDebugFrameOpCodeWriter() 59 LIR** last_lir_insn_; variable
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D | gen_loadstore.cc | 177 def_start = last_lir_insn_; in StoreValue() 185 def_end = last_lir_insn_; in StoreValue() 267 def_start = last_lir_insn_; in StoreValueWide() 273 def_end = last_lir_insn_; in StoreValueWide() 297 LIR *def_start = last_lir_insn_; in StoreFinalValue() 301 LIR *def_end = last_lir_insn_; in StoreFinalValue() 331 LIR *def_start = last_lir_insn_; in StoreFinalValueWide() 337 LIR *def_end = last_lir_insn_; in StoreFinalValueWide()
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D | codegen_util.cc | 103 DCHECK_EQ(after, last_lir_insn_); in MarkSafepointPCAfter() 121 DCHECK(lir == last_lir_insn_); in UnlinkLIR() 122 last_lir_insn_ = nullptr; in UnlinkLIR() 124 } else if (lir == last_lir_insn_) { in UnlinkLIR() 125 last_lir_insn_ = lir->prev; in UnlinkLIR() 1065 last_lir_insn_(nullptr), in Mir2Lir() 1073 cfi_(&last_lir_insn_, in Mir2Lir() 1205 DCHECK(last_lir_insn_ == nullptr); in AppendLIR() 1206 last_lir_insn_ = first_lir_insn_ = lir; in AppendLIR() 1209 last_lir_insn_->next = lir; in AppendLIR() [all …]
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D | gen_common.cc | 315 MarkSafepointPC(last_lir_insn_); in MarkPossibleNullPointerException() 330 MarkSafepointPC(last_lir_insn_); in MarkPossibleStackOverflowException()
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D | mir_to_lir.cc | 1293 ApplyLocalOptimizations(head_lir, last_lir_insn_); in MethodBlockCodeGen()
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D | mir_to_lir.h | 1829 LIR* last_lir_insn_; variable
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/art/compiler/dex/quick/arm/ |
D | int_arm.cc | 228 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32() 265 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect() 271 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect() 952 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 959 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 980 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 1185 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch() 1194 LIR* barrier = last_lir_insn_; in GenMemBarrier()
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D | call_arm.cc | 96 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenLargeSparseSwitch()
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D | assemble_arm.cc | 1245 CodeOffset starting_offset = LinkFixupInsns(first_lir_insn_, last_lir_insn_, 0); in AssembleLIR()
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/art/compiler/dex/quick/x86/ |
D | int_x86.cc | 255 DCHECK(!last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32() 1187 DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); in GenInlinedCas() 1188 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; in GenInlinedCas() 1189 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); in GenInlinedCas() 1194 DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); in GenInlinedCas() 1195 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; in GenInlinedCas() 1196 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); in GenInlinedCas()
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D | target_x86.cc | 605 LIR* mem_barrier = last_lir_insn_; in GenMemBarrier() 1364 DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); in GenInlinedIndexOf() 1365 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - 1; in GenInlinedIndexOf() 1366 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); in GenInlinedIndexOf()
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/art/compiler/dex/quick/arm64/ |
D | int_arm64.cc | 805 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 809 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas() 1031 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch() 1040 LIR* barrier = last_lir_insn_; in GenMemBarrier()
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D | assemble_arm64.cc | 876 CodeOffset starting_offset = LinkFixupInsns(first_lir_insn_, last_lir_insn_, 0); in AssembleLIR()
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