/external/llvm/test/CodeGen/ARM/ |
D | arm-abi-attr.ll | 7 ; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s --check-prefix=AAPCS 9 ; RUN: FileCheck %s --check-prefix=AAPCS 11 ; RUN: FileCheck %s --check-prefix=AAPCS 13 ; The stack is 8 byte aligned on AAPCS and 4 on APCS, so we should get a BIC 20 ; AAPCS: sub sp, sp, #8 21 ; AAPCS-NOT: bic
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D | 2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll | 1 ;Check AAPCS, 5.5 Parameters Passing, C4 and C5 rules.
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D | 2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll | 1 ;Check AAPCS, 5.5 Parameters Passing, C4 and C5 rules.
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D | interrupt-attr.ll | 35 ; Normal AAPCS function (r0-r3 pushed onto stack by hardware, lr set to
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/external/llvm/test/CodeGen/AArch64/ |
D | i1-contents.ll | 6 ; AAPCS: low 8 bits of %in (== w0) will be either 0 or 1. Need to extend to 17 ; AAPCS: low 8 bits of %val1 (== w0) will be either 0 or 1. Need to extend to 30 ; AAPCS: low 8 bits of w0 must be either 0 or 1. Need to mask them off.
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D | argument-blocks.ll | 2 …c -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AAPCS 44 ; CHECK-AAPCS: ldp [[LHS:s[0-9]+]], [[RHS:s[0-9]+]], [sp, #8]
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D | arm64-aapcs.ll | 78 ; Under AAPCS variadic functions have the same calling convention as
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/external/llvm/test/CodeGen/ARM/Windows/ |
D | aapcs.ll | 3 ; AAPCS mandates an 8-byte stack alignment. The alloca is implicitly aligned,
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/external/llvm/test/CodeGen/Thumb2/ |
D | tail-call-r9.ll | 6 ; the destination address. It's callee-saved in AAPCS.
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/external/llvm/lib/Target/ARM/ |
D | ARMCallingConv.td | 110 // ARM AAPCS (EABI) Calling Convention, common parts 138 // ARM AAPCS (EABI) Calling Convention 165 // ARM AAPCS-VFP (EABI) Calling Convention
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/external/llvm/patches/ |
D | 0003-Add-support-for-64-bit-longs.patch | 19 "Use the AAPCS ABI">;
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/external/llvm/test/tools/llvm-readobj/ARM/ |
D | attribute-0.s | 163 @CHECK-OBJ-NEXT: Description: AAPCS 170 @CHECK-OBJ-NEXT: Description: AAPCS
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D | attribute-1.s | 149 @CHECK-OBJ-NEXT: Description: AAPCS VFP
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/external/llvm/test/MC/ARM/ |
D | directive-eabi_attribute.s | 163 @ CHECK-OBJ-NEXT: Description: AAPCS VFP 169 @ CHECK-OBJ-NEXT: Description: AAPCS
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/external/llvm/docs/ |
D | BigEndianNEON.rst | 100 AAPCS section in Considerations 103 The ARM procedure call standard (AAPCS) defines the ABI for passing vectors between functions in re… 147 | AAPCS | ``LDR`` | ``LD1 + REV`` |
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/external/clang/docs/ |
D | AttributeReference.rst | 40 - If the function is AAPCS, Clang instructs the backend to realign the stack to 41 8 bytes on entry. This is a general requirement of the AAPCS at public 43 other AAPCS functions to be called. 45 itself is designed in such a way that functions obeying the normal AAPCS ABI
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/external/clang/lib/CodeGen/ |
D | TargetInfo.cpp | 3882 AAPCS = 0, enumerator 4409 AAPCS = 1, enumerator 4598 case AAPCS: return llvm::CallingConv::ARM_AAPCS; in getABIDefaultCC() 4688 getABIKind() == ARMABIInfo::AAPCS) in classifyArgumentType() 4936 getABIKind() == ARMABIInfo::AAPCS) in EmitVAArg() 7000 AArch64ABIInfo::ABIKind Kind = AArch64ABIInfo::AAPCS; in getTargetCodeGenInfo() 7018 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; in getTargetCodeGenInfo()
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D | CGCall.cpp | 136 return (PCS->getPCS() == PcsAttr::AAPCS ? CC_AAPCS : CC_AAPCS_VFP); in getCallingConventionForDecl()
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/external/clang/include/clang/Basic/ |
D | AttrDocs.td | 649 - If the function is AAPCS, Clang instructs the backend to realign the stack to 650 8 bytes on entry. This is a general requirement of the AAPCS at public 652 other AAPCS functions to be called. 654 itself is designed in such a way that functions obeying the normal AAPCS ABI
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D | Attr.td | 1168 ["AAPCS", "AAPCS_VFP"]>];
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/external/llvm/lib/Target/AArch64/ |
D | AArch64CallingConvention.td | 269 // guarantees more than a normal AAPCS function. x16 and x17 are used on the
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/external/clang/tools/libclang/ |
D | CXType.cpp | 526 TCALLINGCONV(AAPCS); in clang_getFunctionTypeCallingConv()
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/external/clang/lib/Sema/ |
D | SemaDeclAttr.cpp | 3373 PCS = PcsAttr::AAPCS; in handleCallConvAttr()
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