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Searched refs:ADDu (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp188 unsigned ADDu = isN64 ? Mips::DADDu : Mips::ADDu; in eliminateFI() local
195 BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg) in eliminateFI()
DMipsSEFrameLowering.cpp393 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu; in emitPrologue() local
501 BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO) in emitPrologue()
527 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu; in emitEpilogue() local
538 BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO); in emitEpilogue()
DMipsSEInstrInfo.cpp91 Opc = Mips::ADDu, ZeroReg = Mips::ZERO; in copyPhysReg()
364 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu; in adjustStackPtr() local
374 BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill); in adjustStackPtr()
613 unsigned ADDU = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu; in expandEhReturn()
DMipsSEISelDAGToDAG.cpp182 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9); in initGlobalBaseReg()
209 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), GlobalBaseReg) in initGlobalBaseReg()
239 unsigned SLTuOp = Mips::SLTu, ADDuOp = Mips::ADDu; in selectAddESubE()
719 unsigned Opc = Subtarget->isGP64bit() ? Mips::DADDu : Mips::ADDu; in selectNode()
DMipsLongBranch.cpp328 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
DMipsAsmPrinter.cpp1007 EmitInstrRegRegReg(*STI, Mips::ADDu, Mips::S2, Mips::RA, Mips::ZERO); in EmitFPCallStub()
DMipsInstrInfo.td1143 def ADDu : MMRel, ArithLogicR<"addu", GPR32Opnd, 1, II_ADDU, add>,
1542 (ADDu GPR32Opnd:$dst, GPR32Opnd:$src,ZERO), 1>,
1698 (ADDu GPR32:$lhs, GPR32:$rhs)>;
DMipsFastISel.cpp1447 emitInst(Mips::ADDu, DestReg).addReg(TempReg).addReg(Addr.getReg()); in simplifyAddress()
DMipsISelLowering.cpp914 return emitAtomicBinaryPartword(MI, BB, 1, Mips::ADDu); in EmitInstrWithCustomInserter()
916 return emitAtomicBinaryPartword(MI, BB, 2, Mips::ADDu); in EmitInstrWithCustomInserter()
918 return emitAtomicBinary(MI, BB, 4, Mips::ADDu); in EmitInstrWithCustomInserter()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsTargetStreamer.cpp718 TmpInst.setOpcode(Mips::ADDu); in emitDirectiveCpLoad()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp1842 tmpInst.setOpcode(Mips::ADDu); in expandLoadAddressReg()
2082 TempInst.setOpcode(Mips::ADDu); in expandMemInst()