| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 43 State.AllocateStack(8, 4), in f64AssignAPCS()
53 State.AllocateStack(4, 4), in f64AssignAPCS()
92 State.AllocateStack(8, 8), in f64AssignAAPCS()
252 It.convertToMem(State.AllocateStack(Size, Size)); in CC_ARM_AAPCS_Custom_Aggregate()
268 It.convertToMem(State.AllocateStack(Size, Align)); in CC_ARM_AAPCS_Custom_Aggregate()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 400 unsigned AllocateStack(unsigned Size, unsigned Align) { in AllocateStack() function
410 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) { in AllocateStack() function
412 return AllocateStack(Size, Align); in AllocateStack()
417 unsigned AllocateStack(unsigned Size, unsigned Align, in AllocateStack() function
421 return AllocateStack(Size, Align); in AllocateStack()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.h | 55 It.convertToMem(State.AllocateStack(Size, std::max(Align, SlotAlign))); in finishStackBlock()
|
| /external/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 56 unsigned Offset = AllocateStack(Size, Align); in HandleByVal()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 116 ofst = State.AllocateStack(ArgFlags.getByValSize(), 4); in CC_Hexagon_VarArg()
131 ofst = State.AllocateStack(4, 4); in CC_Hexagon_VarArg()
136 ofst = State.AllocateStack(8, 8); in CC_Hexagon_VarArg()
153 unsigned Offset = State.AllocateStack(ArgFlags.getByValSize(), 4); in CC_Hexagon()
202 unsigned Offset = State.AllocateStack(4, 4); in CC_Hexagon32()
227 unsigned Offset = State.AllocateStack(8, 8, Hexagon::D2); in CC_Hexagon64()
280 unsigned Offset = State.AllocateStack(4, 4); in RetCC_Hexagon32()
295 unsigned Offset = State.AllocateStack(8, 8); in RetCC_Hexagon64()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1134 CCInfo.AllocateStack(4, 4); in LowerCCCCallTo()
1142 RetCCInfo.AllocateStack(CCInfo.getNextStackOffset(), 4); in LowerCCCCallTo()
1482 CCInfo.AllocateStack(XFI->getReturnStackOffset(), 4); in LowerReturn()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 65 State.AllocateStack(8,4), in CC_Sparc_Assign_f64()
75 State.AllocateStack(4,4), in CC_Sparc_Assign_f64()
91 unsigned Offset = State.AllocateStack(size, alignment); in CC_Sparc64_Full()
130 unsigned Offset = State.AllocateStack(4, 4); in CC_Sparc64_Half()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2403 unsigned Offset = State.AllocateStack(ValVT.getSizeInBits() >> 3, in CC_MipsO32()
2552 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1); in LowerCall()
2912 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1); in LowerFormalArguments()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1255 CCInfo.AllocateStack(LinkageSize, 8); in processCallArgs()
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| D | PPCISelLowering.cpp | 2650 CCInfo.AllocateStack(LinkageSize, PtrByteSize); in LowerFormalArguments_32SVR4()
2731 CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); in LowerFormalArguments_32SVR4()
4321 CCInfo.AllocateStack(Subtarget.getFrameLowering()->getLinkageSize(), in LowerCall_32SVR4()
4362 CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); in LowerCall_32SVR4()
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 2900 CCInfo.AllocateStack(32, 8); in fastLowerCall()
|
| D | X86ISelLowering.cpp | 2308 CCInfo.AllocateStack(32, 8); in LowerFormalArguments()
2731 CCInfo.AllocateStack(32, 8); in LowerCall()
3406 CCInfo.AllocateStack(32, 8); in IsEligibleForTailCallOptimization()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 77 unsigned Offset = State.AllocateStack(ValVT.getStoreSize(), in allocateStack()
|