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Searched refs:ArgFlags (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/CodeGen/
DCallingConvLower.cpp46 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
47 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
48 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
75 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
76 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeFormalArguments()
93 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
94 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
107 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
108 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeReturn()
125 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h45 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() argument
52 unsigned Align = std::min(ArgFlags.getOrigAlign(), StackAlign); in finishStackBlock()
69 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() argument
77 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Stack_Block()
80 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, 8); in CC_AArch64_Custom_Stack_Block()
88 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block() argument
114 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Block()
136 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, SlotAlign); in CC_AArch64_Custom_Block()
DAArch64CallingConvention.td16 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
DAArch64ISelLowering.cpp2586 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in LowerCall() local
2589 bool Res = AssignFn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); in LowerCall()
2607 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in LowerCall() local
2615 bool Res = AssignFn(i, ValVT, ValVT, CCValAssign::Full, ArgFlags, CCInfo); in LowerCall()
/external/llvm/lib/Target/ARM/
DARMCallingConv.h60 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() argument
114 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
146 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
157 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
159 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
182 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate() argument
195 ArgFlags.getOrigAlign())); in CC_ARM_AAPCS_Custom_Aggregate()
197 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_ARM_AAPCS_Custom_Aggregate()
DARMFastISel.cpp202 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1882 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1889 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2213 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2217 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2234 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2240 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2324 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2329 ArgFlags.reserve(arg_size); in SelectCall()
2367 ArgFlags.push_back(Flags); in SelectCall()
[all …]
DARMCallingConv.td14 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
121 CCIfType<[i32], CCIf<"ArgFlags.getOrigAlign() != 8",
/external/llvm/lib/Target/X86/
DX86CallingConv.h26 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_VectorCallIndirect() argument
31 ArgFlags.setInReg(); in CC_X86_32_VectorCallIndirect()
/external/llvm/include/llvm/Target/
DTargetCallingConv.td42 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
47 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> {
56 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
60 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
64 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
68 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
/external/clang/include/clang/Basic/
DIdentifierTable.h614 ArgFlags = ZeroArg|OneArg enumerator
620 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
626 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
632 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo()
636 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector()
640 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp67 ISD::ArgFlagsTy ArgFlags, CCState &State);
72 ISD::ArgFlagsTy ArgFlags, CCState &State);
77 ISD::ArgFlagsTy ArgFlags, CCState &State);
82 ISD::ArgFlagsTy ArgFlags, CCState &State);
87 ISD::ArgFlagsTy ArgFlags, CCState &State);
92 ISD::ArgFlagsTy ArgFlags, CCState &State);
97 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg() argument
106 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Hexagon_VarArg()
111 if (ArgFlags.isByVal()) { in CC_Hexagon_VarArg()
114 assert ((ArgFlags.getByValSize() > 8) && in CC_Hexagon_VarArg()
[all …]
/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h176 ISD::ArgFlagsTy ArgFlags, CCState &State);
183 ISD::ArgFlagsTy &ArgFlags, CCState &State);
429 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/external/llvm/lib/Target/SystemZ/
DSystemZCallingConv.td13 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h844 ISD::ArgFlagsTy &ArgFlags,
850 ISD::ArgFlagsTy &ArgFlags,
856 ISD::ArgFlagsTy &ArgFlags,
DPPCFastISel.cpp177 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1245 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument
1257 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs()
1476 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
1481 ArgFlags.reserve(NumArgs); in fastLowerCall()
1507 ArgFlags.push_back(Flags); in fastLowerCall()
1514 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in fastLowerCall()
DPPCISelLowering.cpp2379 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument
2387 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
2414 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
4332 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in LowerCall_32SVR4() local
4336 Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, in LowerCall_32SVR4()
4340 ArgFlags, CCInfo); in LowerCall_32SVR4()
/external/llvm/lib/Target/R600/
DAMDGPUCallingConv.td15 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
DAMDGPUISelLowering.cpp76 ISD::ArgFlagsTy ArgFlags, CCState &State) { in allocateStack() argument
78 ArgFlags.getOrigAlign()); in allocateStack()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp306 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local
313 if (ArgFlags.isSExt()) in AnalyzeArguments()
315 else if (ArgFlags.isZExt()) in AnalyzeArguments()
322 if (ArgFlags.isByVal()) { in AnalyzeArguments()
323 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags); in AnalyzeArguments()
344 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2324 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() argument
2333 if (ArgFlags.isByVal()) in CC_MipsO32()
2337 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
2340 if (ArgFlags.isSExt()) in CC_MipsO32()
2342 else if (ArgFlags.isZExt()) in CC_MipsO32()
2352 if (ArgFlags.isSExt()) in CC_MipsO32()
2354 else if (ArgFlags.isZExt()) in CC_MipsO32()
2367 unsigned OrigAlign = ArgFlags.getOrigAlign(); in CC_MipsO32()
2414 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
2417 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); in CC_MipsO32_FP32()
[all …]
DMipsFastISel.cpp197 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
202 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
208 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64() argument
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp41 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() argument
43 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet()
54 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64() argument
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() argument
128 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half() argument