| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstr64Bit.td | 514 multiclass AtomicRMW<SDPatternOperator op32, SDPatternOperator op64> {
526 defm ATOMIC_LOAD_ADD : AtomicRMW<atomic_load_add_32, atomic_load_add_64>;
527 defm ATOMIC_LOAD_SUB : AtomicRMW<atomic_load_sub_32, atomic_load_sub_64>;
528 defm ATOMIC_LOAD_AND : AtomicRMW<atomic_load_and_32, atomic_load_and_64>;
529 defm ATOMIC_LOAD_OR : AtomicRMW<atomic_load_or_32, atomic_load_or_64>;
530 defm ATOMIC_LOAD_XOR : AtomicRMW<atomic_load_xor_32, atomic_load_xor_64>;
531 defm ATOMIC_LOAD_NAND : AtomicRMW<atomic_load_nand_32, atomic_load_nand_64>;
532 defm ATOMIC_LOAD_MIN : AtomicRMW<atomic_load_min_32, atomic_load_min_64>;
533 defm ATOMIC_LOAD_MAX : AtomicRMW<atomic_load_max_32, atomic_load_max_64>;
534 defm ATOMIC_LOAD_UMIN : AtomicRMW<atomic_load_umin_32, atomic_load_umin_64>;
[all …]
|
| /external/llvm/lib/IR/ |
| D | Instruction.cpp | 219 case AtomicRMW: return "atomicrmw"; in getOpcodeName()
404 case Instruction::AtomicRMW: in mayReadFromMemory()
424 case Instruction::AtomicRMW: in mayWriteToMemory()
440 case Instruction::AtomicRMW: in isAtomic()
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| D | Instructions.cpp | 1202 : Instruction(Val->getType(), AtomicRMW, in AtomicRMWInst()
1213 : Instruction(Val->getType(), AtomicRMW, in AtomicRMWInst()
|
| /external/compiler-rt/lib/tsan/rtl/ |
| D | tsan_interface_atomic.cc | 299 static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, morder mo) { in AtomicRMW() function
358 return AtomicRMW<T, func_xchg>(thr, pc, a, v, mo); in AtomicExchange()
364 return AtomicRMW<T, func_add>(thr, pc, a, v, mo); in AtomicFetchAdd()
370 return AtomicRMW<T, func_sub>(thr, pc, a, v, mo); in AtomicFetchSub()
376 return AtomicRMW<T, func_and>(thr, pc, a, v, mo); in AtomicFetchAnd()
382 return AtomicRMW<T, func_or>(thr, pc, a, v, mo); in AtomicFetchOr()
388 return AtomicRMW<T, func_xor>(thr, pc, a, v, mo); in AtomicFetchXor()
394 return AtomicRMW<T, func_nand>(thr, pc, a, v, mo); in AtomicFetchNand()
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | atomics.ll | 110 ; AtomicRMW
|
| /external/llvm/include/llvm/IR/ |
| D | Instruction.def | 138 HANDLE_MEMORY_INST(32, AtomicRMW , AtomicRMWInst )
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| D | Instructions.h | 757 return I->getOpcode() == Instruction::AtomicRMW;
|
| /external/llvm/include/llvm/Analysis/ |
| D | AliasAnalysis.h | 398 case Instruction::AtomicRMW: in getModRefInfo()
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| /external/llvm/lib/AsmParser/ |
| D | LLLexer.cpp | 739 INSTKEYWORD(atomicrmw, AtomicRMW); in LexIdentifier()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1552 case AtomicRMW: return 0; in InstructionOpcodeToISD()
|
| /external/llvm/bindings/ocaml/llvm/ |
| D | llvm.ml | 213 | AtomicRMW Constructor
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| D | llvm.mli | 271 | AtomicRMW Constructor
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| /external/llvm/lib/Target/CppBackend/ |
| D | CPPBackend.cpp | 1589 case Instruction::AtomicRMW: { in printInstruction()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 1086 case Instruction::AtomicRMW: NumFastIselFailAtomicRMW++; return; in collectFailStats()
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| /external/llvm/lib/Analysis/ |
| D | ValueTracking.cpp | 2913 case Instruction::AtomicRMW: in isSafeToSpeculativelyExecute()
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| /external/llvm/lib/Bitcode/Writer/ |
| D | BitcodeWriter.cpp | 1920 case Instruction::AtomicRMW: in WriteInstruction()
|