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/external/llvm/test/MC/Sparc/
Dsparc-ctrl-instructions.s47 ! CHECK: ba .BB0 ! encoding: [0x10,0b10AAAAAA,A,A]
48 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
49 ba .BB0
51 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
52 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
53 bne .BB0
55 ! CHECK: be .BB0 ! encoding: [0x02,0b10AAAAAA,A,A]
56 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
57 be .BB0
59 ! CHECK: bg .BB0 ! encoding: [0x14,0b10AAAAAA,A,A]
[all …]
Dsparc64-ctrl-instructions.s4 ! CHECK: bne %xcc, .BB0 ! encoding: [0x12,0b01101AAA,A,A]
5 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
6 bne %xcc, .BB0
8 ! CHECK: be %xcc, .BB0 ! encoding: [0x02,0b01101AAA,A,A]
9 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
10 be %xcc, .BB0
12 ! CHECK: bg %xcc, .BB0 ! encoding: [0x14,0b01101AAA,A,A]
13 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
14 bg %xcc, .BB0
16 ! CHECK: ble %xcc, .BB0 ! encoding: [0x04,0b01101AAA,A,A]
[all …]
/external/llvm/unittests/IR/
DDominatorTreeTest.cpp35 BasicBlock *BB0 = FI++; in runOnFunction() local
36 BasicBlock::iterator BBI = BB0->begin(); in runOnFunction()
60 EXPECT_TRUE(DT->isReachableFromEntry(BB0)); in runOnFunction()
67 EXPECT_TRUE(DT->dominates(BB0, BB0)); in runOnFunction()
68 EXPECT_TRUE(DT->dominates(BB0, BB1)); in runOnFunction()
69 EXPECT_TRUE(DT->dominates(BB0, BB2)); in runOnFunction()
70 EXPECT_TRUE(DT->dominates(BB0, BB3)); in runOnFunction()
71 EXPECT_TRUE(DT->dominates(BB0, BB4)); in runOnFunction()
73 EXPECT_FALSE(DT->dominates(BB1, BB0)); in runOnFunction()
79 EXPECT_FALSE(DT->dominates(BB2, BB0)); in runOnFunction()
[all …]
DInstructionsTest.cpp318 BasicBlock* BB0 = BasicBlock::Create(C); in TEST() local
320 ICmpInst *ICmp2 = new ICmpInst(*BB0, ICmpInst::ICMP_SGE, PtrVecA, PtrVecB); in TEST()
385 delete BB0; in TEST()
DMetadataTest.cpp347 auto *BB0 = BasicBlock::Create(Context, "entry", F0); in TEST_F() local
349 auto *R0 = ReturnInst::Create(Context, BB0); in TEST_F()
371 auto *BB0 = BasicBlock::Create(Context, "entry", F0); in TEST_F() local
377 CallInst::Create(Intrinsic, MAV0, "", BB0); in TEST_F()
/external/llvm/test/CodeGen/Mips/
Datomic.ll26 ; ALL: $[[BB0:[A-Z_0-9]+]]:
30 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
31 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
44 ; ALL: $[[BB0:[A-Z_0-9]+]]:
49 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
50 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
66 ; ALL: $[[BB0:[A-Z_0-9]+]]:
69 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
70 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
87 ; ALL: $[[BB0:[A-Z_0-9]+]]:
[all …]
Dlongbranch.ll34 ; CHECK: beqz $4, $[[BB0:BB[0-9_]+]]
39 ; CHECK: $[[BB0]]:
52 ; O32: bnez $4, $[[BB0:BB[0-9_]+]]
67 ; O32: $[[BB0]]:
79 ; N64: bnez $4, $[[BB0:BB[0-9_]+]]
95 ; N64: $[[BB0]]:
109 ; MICROMIPS: bnez $4, $[[BB0:BB[0-9_]+]]
124 ; MICROMIPS: $[[BB0]]:
138 ; NACL: bnez $4, $[[BB0:BB[0-9_]+]]
154 ; NACL: $[[BB0]]:
Docteon.ll94 ; OCTEON: bbit0 $4, 3, $[[BB0:BB[0-9_]+]]
96 ; MIPS64: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
110 ; OCTEON: bbit032 $4, 3, $[[BB0:BB[0-9_]+]]
114 ; MIPS64: bnez $[[T2]], $[[BB0:BB[0-9_]+]]
128 ; OCTEON: bbit1 $4, 3, $[[BB0:BB[0-9_]+]]
130 ; MIPS64: beqz $[[T0]], $[[BB0:BB[0-9_]+]]
144 ; OCTEON: bbit132 $4, 3, $[[BB0:BB[0-9_]+]]
148 ; MIPS64: beqz $[[T2]], $[[BB0:BB[0-9_]+]]
Dmicromips-atomic.ll13 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
17 ; CHECK: beqzc $[[R2]], $[[BB0]]
Dprevent-hoisting.ll15 ; CHECK: b $[[BB0:BB[0-9_]+]]
24 ; CHECK: [[BB0]]:
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dselect.ll38 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
41 ; M2-M3: $[[BB0]]:
63 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
66 ; M2-M3: $[[BB0]]:
88 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
91 ; M2-M3: $[[BB0]]:
113 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
116 ; M2: $[[BB0]]:
143 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
146 ; M3: $[[BB0]]:
[all …]
Dlshr.ll89 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
96 ; M2: $[[BB0]]:
144 ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]]
151 ; M3: $[[BB0]]:
Dashr.ll91 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
98 ; M2: $[[BB0]]:
151 ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]]
158 ; M3: $[[BB0]]:
Dshl.ll101 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
108 ; M2: $[[BB0]]:
156 ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]]
163 ; M3: $[[BB0]]:
/external/llvm/test/Transforms/ConstProp/
Dphi.ll7 BB0:
10 BB1: ; preds = %BB0
13 BB3: ; preds = %BB1, %BB0
14 %Ret = phi i32 [ 1, %BB0 ], [ 1, %BB1 ] ; <i32> [#uses=1]
/external/llvm/test/Transforms/SimplifyCFG/
Dindirectbr.ll6 ; CHECK: indirectbr i8* %t, [label %BB0, label %BB1, label %BB2]
7 ; CHECK: %x = phi i32 [ 0, %BB0 ], [ 1, %entry ]
16 store i8* blockaddress(@indbrtest0, %BB0), i8** %P
21 indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
22 BB0:
26 %x = phi i32 [ 0, %BB0 ], [ 1, %entry ], [ 1, %entry ]
39 ; CHECK: br label %BB0
43 store i8* blockaddress(@indbrtest1, %BB0), i8** %P
46 indirectbr i8* %t, [label %BB0, label %BB0]
47 BB0:
[all …]
/external/llvm/test/Transforms/InstCombine/
Dphi.ll8 BB0:
13 %B = phi i32 [ %A, %BB0 ]
24 BB0:
32 %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ]
40 BB0:
45 %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ]
56 BB0:
73 BB0:
76 Loop: ; preds = %Loop, %BB0
78 %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ]
[all …]
Dcrash.ll110 BB0:
117 %v5_ = phi i1 [ true, %BB0], [false, %BB1]
/external/llvm/test/CodeGen/AArch64/
Dlarge_shift.ll13 br i1 %t1, label %BB1, label %BB0
15 BB0:
/external/llvm/lib/Transforms/Scalar/
DMergedLoadStoreMotion.cpp267 BasicBlock *BB0 = Load0->getParent(); in canHoistFromBlock() local
273 !isLoadHoistBarrierInRange(BB0->front(), *Load0, Load0)) { in canHoistFromBlock()
418 BasicBlock *BB0 = Store0->getParent(); in canSinkFromBlock() local
434 BB0->back(), Loc0)) { in canSinkFromBlock()
/external/llvm/test/Assembler/
D2002-08-22-DominanceProblem.ll8 BB0:
/external/llvm/test/CodeGen/ARM/
Dcall.ll31 BB0:
/external/llvm/test/Transforms/ADCE/
D2002-05-23-ZeroArgPHITest.ll2 ; left is the store instruction in BB0. The problem this testcase was running
/external/llvm/lib/Analysis/
DValueTracking.cpp629 BasicBlock *BB0 = BI->getSuccessor(0); in computeKnownBitsFromDominatingCondition() local
630 BasicBlockEdge Edge(BI->getParent(), BB0); in computeKnownBitsFromDominatingCondition()
663 BasicBlock *BB0 = BI->getSuccessor(0); in computeKnownBitsFromDominatingCondition() local
664 BasicBlockEdge Edge(BI->getParent(), BB0); in computeKnownBitsFromDominatingCondition()
/external/icu/icu4c/source/data/unidata/
DDerivedCoreProperties.txt6654 1BB0..1BB9 ; ID_Continue
8350 1BB0..1BB9 ; XID_Continue
9769 1BB0..1BB9 ; Grapheme_Base

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