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Searched refs:BITCAST (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp59 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
60 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
76 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
77 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
82 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
83 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
93 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
94 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
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DLegalizeVectorOps.cpp401 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in Promote()
412 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in Promote()
747 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1); in ExpandSELECT()
748 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); in ExpandSELECT()
757 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val); in ExpandSELECT()
801 ISD::BITCAST, DL, VT, in ExpandANY_EXTEND_VECTOR_INREG()
855 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
876 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBSWAP()
879 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
916 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
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DLegalizeVectorTypes.cpp52 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; in ScalarizeVectorResult()
161 return DAG.getNode(ISD::BITCAST, SDLoc(N), in ScalarizeVecRes_BITCAST()
423 case ISD::BITCAST: in ScalarizeVectorOperand()
473 return DAG.getNode(ISD::BITCAST, SDLoc(N), in ScalarizeVecOp_BITCAST()
587 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; in SplitVectorResult()
740 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
741 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); in SplitVecRes_BITCAST()
749 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
750 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); in SplitVecRes_BITCAST()
764 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
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DLegalizeDAG.cpp310 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); in ExpandUnalignedStore()
431 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in ExpandUnalignedLoad()
742 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value); in LegalizeStoreOps()
912 RVal = DAG.getNode(ISD::BITCAST, dl, VT, Res); in LegalizeLoadOps()
1570 SignBit = DAG.getNode(ISD::BITCAST, dl, IVT, Tmp2); in ExpandFCOPYSIGN()
2493 SDValue LoFlt = DAG.getNode(ISD::BITCAST, dl, MVT::f64, LoOr); in ExpandLegalINT_TO_FP()
2494 SDValue HiFlt = DAG.getNode(ISD::BITCAST, dl, MVT::f64, HiOr); in ExpandLegalINT_TO_FP()
2995 case ISD::BITCAST: in ExpandNode()
3122 Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), in ExpandNode()
3174 Op0 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op0); in ExpandNode()
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DSelectionDAGBuilder.cpp142 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
143 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
175 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); in getCopyFromParts()
176 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); in getCopyFromParts()
218 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyFromParts()
310 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyFromPartsVector()
325 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyFromPartsVector()
389 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in getCopyToParts()
394 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in getCopyToParts()
403 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in getCopyToParts()
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DDAGCombiner.cpp1346 case ISD::BITCAST: return visitBITCAST(N); in visit()
2605 if ((N0.getOpcode() == ISD::BITCAST || in SimplifyBinOpWithSameOpcodeHands()
6619 SDValue V = DAG.getNode(ISD::BITCAST, SDLoc(N), in visitTRUNCATE()
6646 N0.getOpcode() == ISD::BITCAST && N0.hasOneUse() && in visitTRUNCATE()
6825 return DAG.getNode(ISD::BITCAST, SDLoc(N), VT, N0); in visitBITCAST()
6829 if (N0.getOpcode() == ISD::BITCAST) in visitBITCAST()
6830 return DAG.getNode(ISD::BITCAST, SDLoc(N), VT, in visitBITCAST()
6866 SDValue NewConv = DAG.getNode(ISD::BITCAST, SDLoc(N0), VT, in visitBITCAST()
6889 SDValue X = DAG.getNode(ISD::BITCAST, SDLoc(N0), in visitBITCAST()
6914 SDValue Cst = DAG.getNode(ISD::BITCAST, SDLoc(N0), in visitBITCAST()
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DLegalizeFloatTypes.cpp63 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N); break; in SoftenFloatResult()
682 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break; in SoftenFloatOperand()
710 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), in SoftenFloatOp_BITCAST()
879 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; in ExpandFloatResult()
1369 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break; in ExpandFloatOperand()
1610 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break; in PromoteFloatOperand()
1727 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break; in PromoteFloatResult()
DLegalizeTypes.cpp891 return DAG.getNode(ISD::BITCAST, SDLoc(Op), in BitConvertToInteger()
902 return DAG.getNode(ISD::BITCAST, SDLoc(Op), in BitConvertVectorToIntegerVector()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp264 setOperationAction(ISD::BITCAST , MVT::f32 , Expand); in X86TargetLowering()
265 setOperationAction(ISD::BITCAST , MVT::i32 , Expand); in X86TargetLowering()
267 setOperationAction(ISD::BITCAST , MVT::f64 , Expand); in X86TargetLowering()
269 setOperationAction(ISD::BITCAST , MVT::i64 , Expand); in X86TargetLowering()
773 setOperationAction(ISD::BITCAST, MMXTy, Expand); in X86TargetLowering()
935 setOperationAction(ISD::BITCAST, MVT::v2i32, Custom); in X86TargetLowering()
936 setOperationAction(ISD::BITCAST, MVT::v4i16, Custom); in X86TargetLowering()
937 setOperationAction(ISD::BITCAST, MVT::v8i8, Custom); in X86TargetLowering()
1533 setTargetDAGCombine(ISD::BITCAST); in X86TargetLowering()
1906 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
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/external/llvm/test/CodeGen/X86/
Dvshift-6.ll12 ; B = BITCAST MVT::v16i8, A
16 ; D = BITCAST MVT::v16i8, C
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp827 setOperationAction(ISD::BITCAST, MVT::i64, Custom); in ARMTargetLowering()
1402 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1546 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2213 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
2328 } else if (Copy->getOpcode() == ISD::BITCAST) { in isUsedByReturnOnly()
3046 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3129 } else if (Op->getOpcode() == ISD::BITCAST && in isFloatingPointZero()
3875 bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || in LowerFCOPYSIGN()
3887 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
3895 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
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/external/llvm/lib/Target/Mips/
DMipsSEISelDAGToDAG.cpp519 if (N->getOpcode() == ISD::BITCAST) in selectVSplatCommon()
594 if (N->getOpcode() == ISD::BITCAST) in selectVSplatUimmPow2()
625 if (N->getOpcode() == ISD::BITCAST) in selectVSplatMaskL()
658 if (N->getOpcode() == ISD::BITCAST) in selectVSplatMaskR()
679 if (N->getOpcode() == ISD::BITCAST) in selectVSplatUimmInvPow2()
DMipsISelLowering.cpp1884 DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(0)) : in lowerFCOPYSIGN32()
1888 DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(1)) : in lowerFCOPYSIGN32()
1911 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Res); in lowerFCOPYSIGN32()
1927 SDValue X = DAG.getNode(ISD::BITCAST, DL, TyX, Op.getOperand(0)); in lowerFCOPYSIGN64()
1928 SDValue Y = DAG.getNode(ISD::BITCAST, DL, TyY, Op.getOperand(1)); in lowerFCOPYSIGN64()
1943 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), I); in lowerFCOPYSIGN64()
1964 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Or); in lowerFCOPYSIGN64()
2301 return DAG.getNode(ISD::BITCAST, SDLoc(Op), Op.getValueType(), Trunc); in lowerFP_TO_SINT()
2625 Arg = DAG.getNode(ISD::BITCAST, DL, LocVT, Arg); in LowerCall()
2642 Arg = DAG.getNode(ISD::BITCAST, DL, LocVT, Arg); in LowerCall()
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DMipsSEISelLowering.cpp73 setOperationAction(ISD::BITCAST, VecTys[i], Legal); in MipsSETargetLowering()
253 setOperationAction(ISD::BITCAST, Ty, Legal); in addMSAIntType()
304 setOperationAction(ISD::BITCAST, Ty, Legal); in addMSAFloatType()
623 if (N->getOpcode() == ISD::BITCAST) in isVectorAllOnes()
1396 Result = DAG.getNode(ISD::BITCAST, DL, ResVecTy, Result); in lowerMSASplatZExt()
1436 Result = DAG.getNode(ISD::BITCAST, DL, VecTy, Result); in getBuildVectorSplat()
1461 DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, in lowerMSABinaryBitImmIntr()
2370 Result = DAG.getNode(ISD::BITCAST, SDLoc(Node), ResTy, Result); in lowerBUILD_VECTOR()
/external/llvm/test/CodeGen/Hexagon/vect/
Dvect-bitcast.ll3 ; Used to fail with "Cannot BITCAST between types of different sizes!"
Dvect-bitcast-1.ll3 …`VT.getSizeInBits() == Operand.getValueType().getSizeInBits() && "Cannot BITCAST between types of …
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp446 setOperationAction(ISD::BITCAST, MVT::i16, Custom); in AArch64TargetLowering()
447 setOperationAction(ISD::BITCAST, MVT::f16, Custom); in AArch64TargetLowering()
486 setTargetDAGCombine(ISD::BITCAST); in AArch64TargetLowering()
1719 Op = DAG.getNode(ISD::BITCAST, DL, MVT::f32, Op); in LowerBITCAST()
1913 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
1915 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
1924 case ISD::BITCAST: in LowerOperation()
2150 ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
2360 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in LowerCallResult()
2696 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h468 BITCAST, enumerator
/external/llvm/lib/Target/R600/
DSIISelLowering.cpp184 case ISD::BITCAST: in SITargetLowering()
1024 SDValue LHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(1)); in LowerSELECT()
1025 SDValue RHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(2)); in LowerSELECT()
1038 return DAG.getNode(ISD::BITCAST, DL, MVT::i64, Res); in LowerSELECT()
1160 SDValue NumBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); in LowerFDIV64()
1161 SDValue DenBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Y); in LowerFDIV64()
1162 SDValue Scale0BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale0); in LowerFDIV64()
1163 SDValue Scale1BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale1); in LowerFDIV64()
DAMDGPUISelDAGToDAG.cpp438 SDValue BitCast = CurDAG->getNode(ISD::BITCAST, SDLoc(N), in Select()
454 SDValue NewValue = CurDAG->getNode(ISD::BITCAST, SDLoc(N), in Select()
461 if (NewValue.getOpcode() == ISD::BITCAST) { in Select()
1153 return CurDAG->getNode(ISD::BITCAST, DL, DestVT, Src).getNode(); in SelectAddrSpaceCast()
DAMDGPUISelLowering.cpp1954 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerFTRUNC()
1971 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64); in LowerFTRUNC()
1973 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src); in LowerFTRUNC()
1991 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC()
2055 SDValue L = DAG.getNode(ISD::BITCAST, SL, MVT::i64, X); in LowerFROUND64()
2064 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); in LowerFROUND64()
2087 K = DAG.getNode(ISD::BITCAST, SL, MVT::f64, K); in LowerFROUND64()
2146 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerINT_TO_FP64()
2225 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Result); in LowerFP64_TO_INT()
2363 SDValue CastLoad = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad.getValue(0)); in performStoreCombine()
DR600ISelLowering.cpp1209 True = DAG.getNode(ISD::BITCAST, DL, CompareVT, True); in LowerSELECT_CC()
1210 False = DAG.getNode(ISD::BITCAST, DL, CompareVT, False); in LowerSELECT_CC()
1229 return DAG.getNode(ISD::BITCAST, DL, VT, SelectNode); in LowerSELECT_CC()
1943 if (Arg.getOpcode() == ISD::BITCAST && in PerformDAGCombine()
1947 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getVTList(), in PerformDAGCombine()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1137 Result = DAG.getNode(ISD::BITCAST, DL, VT, Result); in LowerLOAD()
2001 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in LowerVECTOR_SHIFT()
2140 return DAG.getNode(ISD::BITCAST, dl, VT, ConstVal); in LowerBUILD_VECTOR()
2164 return DAG.getNode(ISD::BITCAST, dl, VT, Combined); in LowerCONCAT_VECTORS()
2173 return DAG.getNode(ISD::BITCAST, dl, VT, Combined); in LowerCONCAT_VECTORS()
2198 return DAG.getNode(ISD::BITCAST, dl, VT, ConstVal); in LowerCONCAT_VECTORS()
2265 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerEXTRACT_VECTOR()
2285 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerEXTRACT_VECTOR()
2313 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerINSERT_VECTOR()
2337 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerINSERT_VECTOR()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp400 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); in LowerFormalArguments_32()
408 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg); in LowerFormalArguments_32()
455 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); in LowerFormalArguments_32()
771 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall_32()
861 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg); in LowerCall_32()
1122 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall_64()
1432 setOperationAction(ISD::BITCAST, MVT::f32, Expand); in SparcTargetLowering()
1433 setOperationAction(ISD::BITCAST, MVT::i32, Expand); in SparcTargetLowering()
1465 setOperationAction(ISD::BITCAST, MVT::f64, Expand); in SparcTargetLowering()
1466 setOperationAction(ISD::BITCAST, MVT::i64, Expand); in SparcTargetLowering()
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/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp259 setOperationAction(ISD::BITCAST, MVT::f32, Expand); in PPCTargetLowering()
260 setOperationAction(ISD::BITCAST, MVT::i32, Expand); in PPCTargetLowering()
261 setOperationAction(ISD::BITCAST, MVT::i64, Expand); in PPCTargetLowering()
262 setOperationAction(ISD::BITCAST, MVT::f64, Expand); in PPCTargetLowering()
2055 return DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, in LowerSETCC()
2057 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)), in LowerSETCC()
2058 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(1)), in LowerSETCC()
3109 ArgVal = DAG.getNode(ISD::BITCAST, dl, ObjectVT, ArgVal); in LowerFormalArguments_64SVR4()
4902 ArgVal = DAG.getNode(ISD::BITCAST, dl, MVT::i64, Arg); in LowerCall_64SVR4()
4906 ArgVal = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg); in LowerCall_64SVR4()
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