| /external/elfutils/src/libasm/ |
| D | asm_addint8.c | 49 #define BSWAP(size) _BSWAP(size) macro
107 var = BSWAP(SIZE) (var);
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | bswap-fold.ll | 92 ; Fold: OP( BSWAP(x), BSWAP(y) ) -> BSWAP( OP(x, y) )
93 ; Fold: OP( BSWAP(x), CONSTANT ) -> BSWAP( OP(x, BSWAP(CONSTANT) ) )
|
| /external/boringssl/src/crypto/sha/asm/ |
| D | sha1-586.pl | 423 my ($ABCD,$E,$E_,$BSWAP)=map("xmm$_",(0..3));
455 &movdqa ($BSWAP,&QWP(0x50,$tmp1)); # byte-n-word swap
462 &pshufb (@MSG[0],$BSWAP);
464 &pshufb (@MSG[1],$BSWAP);
465 &pshufb (@MSG[2],$BSWAP);
466 &pshufb (@MSG[3],$BSWAP);
499 &pshufb (@MSG[0],$BSWAP);
505 &pshufb (@MSG[1],$BSWAP);
511 &pshufb (@MSG[2],$BSWAP);
516 &pshufb (@MSG[3],$BSWAP);
|
| D | sha1-x86_64.pl | 337 my ($ABCD,$E,$E_,$BSWAP,$ABCD_SAVE,$E_SAVE)=map("%xmm$_",(0..3,8,9));
357 movdqa K_XX_XX+0xa0(%rip),$BSWAP # byte-n-word swap
364 pshufb $BSWAP,@MSG[0]
366 pshufb $BSWAP,@MSG[1]
367 pshufb $BSWAP,@MSG[2]
369 pshufb $BSWAP,@MSG[3]
404 pshufb $BSWAP,@MSG[0]
410 pshufb $BSWAP,@MSG[1]
416 pshufb $BSWAP,@MSG[2]
421 pshufb $BSWAP,@MSG[3]
|
| D | sha512-x86_64.pl | 535 my ($Wi,$ABEF,$CDGH,$TMP,$BSWAP,$ABEF_SAVE,$CDGH_SAVE)=map("%xmm$_",(0..2,7..10));
562 movdqa $TMP,$BSWAP # offload
650 movdqa $BSWAP,$TMP
|
| /external/opencv/otherlibs/highgui/ |
| D | bitstrm.h | 259 #define BSWAP(v) (((v)<<24)|(((v)&0xff00)<<8)| \ macro
|
| D | grfmt_tiff.cpp | 289 val = BSWAP( val ); in GetDWordEx()
|
| D | bitstrm.cpp | 67 temp = BSWAP( temp ); in bsBSwapBlock()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 491 class BSWAP<bits<32> SizeOp, string OpcodeStr, list<dag> Pattern>
512 def BSWAP16 : BSWAP<16, "bswap16", [(set GPR:$dst, (srl (bswap GPR:$src), (i64 48)))]>;
513 def BSWAP32 : BSWAP<32, "bswap32", [(set GPR:$dst, (srl (bswap GPR:$src), (i64 32)))]>;
514 def BSWAP64 : BSWAP<64, "bswap64", [(set GPR:$dst, (bswap GPR:$src))]>;
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 326 BSWAP, CTTZ, CTLZ, CTPOP, enumerator
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 149 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in Mips16TargetLowering()
150 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in Mips16TargetLowering()
|
| D | MipsISelLowering.cpp | 392 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in MipsTargetLowering()
394 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in MipsTargetLowering()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 280 case ISD::BSWAP: in LegalizeOp()
686 case ISD::BSWAP: in Expand()
|
| D | SelectionDAGDumper.cpp | 291 case ISD::BSWAP: return "bswap"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 56 case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break; in PromoteIntegerResult()
309 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), in PromoteIntRes_BSWAP()
1243 case ISD::BSWAP: ExpandIntRes_BSWAP(N, Lo, Hi); break; in ExpandIntegerResult()
1788 Lo = DAG.getNode(ISD::BSWAP, dl, Lo.getValueType(), Lo); in ExpandIntRes_BSWAP()
1789 Hi = DAG.getNode(ISD::BSWAP, dl, Hi.getValueType(), Hi); in ExpandIntRes_BSWAP()
|
| D | LegalizeVectorTypes.cpp | 70 case ISD::BSWAP: in ScalarizeVectorResult()
610 case ISD::BSWAP: in SplitVectorResult()
1795 case ISD::BSWAP: in WidenVectorResult()
|
| D | LegalizeDAG.cpp | 2854 case ISD::BSWAP: in ExpandNode()
4068 case ISD::BSWAP: { in PromoteNode()
4071 Tmp1 = DAG.getNode(ISD::BSWAP, dl, NVT, Tmp1); in PromoteNode()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 153 setOperationAction(ISD::BSWAP, VT, Expand); in InitAMDILLowering()
|
| /external/llvm/docs/ |
| D | ExtendingLLVM.rst | 119 well. For a good example, see ``ISD::BSWAP``, which promotes its operand to
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 189 setOperationAction(ISD::BSWAP, MVT::i16, Expand); in NVPTXTargetLowering()
190 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in NVPTXTargetLowering()
191 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in NVPTXTargetLowering()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1644 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in HexagonTargetLowering()
1741 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in HexagonTargetLowering()
|
| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 277 setOperationAction(ISD::BSWAP, VT, Expand); in AMDGPUTargetLowering()
346 setOperationAction(ISD::BSWAP, VT, Expand); in AMDGPUTargetLowering()
|
| D | SIISelLowering.cpp | 105 setOperationAction(ISD::BSWAP, MVT::i32, Legal); in SITargetLowering()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1478 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in SparcTargetLowering()
1535 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in SparcTargetLowering()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 209 setOperationAction(ISD::BSWAP, MVT::i32 , Expand); in PPCTargetLowering()
213 setOperationAction(ISD::BSWAP, MVT::i64 , Expand); in PPCTargetLowering()
471 setOperationAction(ISD::BSWAP, VT, Expand); in PPCTargetLowering()
826 setTargetDAGCombine(ISD::BSWAP); in PPCTargetLowering()
9915 N->getOperand(1).getOpcode() == ISD::BSWAP && in PerformDAGCombine()
10187 case ISD::BSWAP: in PerformDAGCombine()
|