Searched refs:BaseOpc (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/test/TableGen/ |
| D | pr8330.td | 14 multiclass X<bits<8> BaseOpc> {
15 def bar : Whatev<Or4<BaseOpc>.V >;
18 multiclass Y<bits<8> BaseOpc> {
19 def foo : Whatever<Or4<BaseOpc>.V >;
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 945 multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
952 def NAME#8rr : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag>;
954 def NAME#16rr : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag>;
955 def NAME#32rr : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag>;
956 def NAME#64rr : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag>;
985 def NAME#8mr : BinOpMR_RMW<BaseOpc, mnemonic, Xi8 , opnode>;
986 def NAME#16mr : BinOpMR_RMW<BaseOpc, mnemonic, Xi16, opnode>;
987 def NAME#32mr : BinOpMR_RMW<BaseOpc, mnemonic, Xi32, opnode>;
988 def NAME#64mr : BinOpMR_RMW<BaseOpc, mnemonic, Xi64, opnode>;
1028 multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
[all …]
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| D | X86FastISel.cpp | 2516 unsigned BaseOpc, CondOpc; in fastLowerIntrinsicCall() local
2520 BaseOpc = UseIncDec ? unsigned(X86ISD::INC) : unsigned(ISD::ADD); in fastLowerIntrinsicCall()
2524 BaseOpc = ISD::ADD; CondOpc = X86::SETBr; break; in fastLowerIntrinsicCall()
2526 BaseOpc = UseIncDec ? unsigned(X86ISD::DEC) : unsigned(ISD::SUB); in fastLowerIntrinsicCall()
2530 BaseOpc = ISD::SUB; CondOpc = X86::SETBr; break; in fastLowerIntrinsicCall()
2532 BaseOpc = X86ISD::SMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall()
2534 BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall()
2550 if (BaseOpc == X86ISD::INC || BaseOpc == X86ISD::DEC) { in fastLowerIntrinsicCall()
2552 bool IsDec = BaseOpc == X86ISD::DEC; in fastLowerIntrinsicCall()
2557 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, LHSIsKill, in fastLowerIntrinsicCall()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 553 int BaseOpc = in MergeOps() local
561 BaseOpc = in MergeOps()
578 (BaseOpc == ARM::tADDi8 || BaseOpc == ARM::tSUBi8)) { in MergeOps()
596 if (BaseOpc == ARM::tADDrSPi) { in MergeOps()
598 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase) in MergeOps()
602 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase), true) in MergeOps()
606 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase) in MergeOps()
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