Searched refs:CondReg (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 2323 unsigned CondReg = getRegForValue(TI->getOperand(0)); in selectBranch() local 2324 if (!CondReg) in selectBranch() 2330 CondReg = fastEmitInst_extractsubreg(MVT::i32, CondReg, CondIsKill, in selectBranch() 2335 unsigned ANDReg = emitAnd_ri(MVT::i32, CondReg, CondIsKill, 1); in selectBranch() 2373 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local 2374 if (!CondReg) in selectBranch() 2393 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local 2394 if (CondReg == 0) in selectBranch() 2405 emitICmp_ri(MVT::i32, CondReg, CondRegIsKill, 0); in selectBranch() 2625 unsigned CondReg = getRegForValue(Cond); in selectSelect() local [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 827 unsigned CondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch() local 828 if (!emitCmp(CondReg, CI)) in selectBranch() 831 .addReg(CondReg) in selectBranch()
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 1826 unsigned CondReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local 1827 if (CondReg == 0) in X86FastEmitCMoveSelect() 1832 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); in X86FastEmitCMoveSelect() 1993 unsigned CondReg = getRegForValue(Cond); in X86FastEmitPseudoSelect() local 1994 if (CondReg == 0) in X86FastEmitPseudoSelect() 1998 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); in X86FastEmitPseudoSelect()
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 1634 unsigned CondReg = getRegForValue(I->getOperand(0)); in SelectSelect() local 1635 if (CondReg == 0) return false; in SelectSelect() 1661 CondReg = constrainOperandRegClass(TII.get(CmpOpc), CondReg, 0); in SelectSelect() 1664 .addReg(CondReg) in SelectSelect()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 746 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch() local 749 CondReg)) in SelectBranch() 753 .addImm(PPCPred).addReg(CondReg).addMBB(TBB); in SelectBranch()
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