| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 493 MI.addOperand(MCOperand::CreateImm(tmp)); in DecodeINSVE_DF()
499 MI.addOperand(MCOperand::CreateImm(0)); in DecodeINSVE_DF()
538 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeAddiGroupBranch()
577 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeDaddiGroupBranch()
620 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBlezlGroupBranch()
664 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBgtzlGroupBranch()
713 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBgtzGroupBranch()
755 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBlezGroupBranch()
1065 Inst.addOperand(MCOperand::CreateImm(Offset)); in DecodeMem()
1081 Inst.addOperand(MCOperand::CreateImm(Offset)); in DecodeCacheOp()
[all …]
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 613 Inst.addOperand(MCOperand::CreateImm(getImm())); in addImmOperands()
622 Inst.addOperand(MCOperand::CreateImm(getImm())); in addS16ImmOperands()
625 Inst.addOperand(MCOperand::CreateImm(getImmS16Context())); in addS16ImmOperands()
637 Inst.addOperand(MCOperand::CreateImm(getImm())); in addU16ImmOperands()
640 Inst.addOperand(MCOperand::CreateImm(getImmU16Context())); in addU16ImmOperands()
651 Inst.addOperand(MCOperand::CreateImm(getImm() / 4)); in addBranchTargetOperands()
697 static std::unique_ptr<PPCOperand> CreateImm(int64_t Val, SMLoc S, SMLoc E, in CreateImm() function
741 return CreateImm(CE->getValue(), S, E, IsPPC64); in CreateFromMCExpr()
780 Inst.addOperand(MCOperand::CreateImm(-Op.getImm())); in addNegOperand()
857 TmpInst.addOperand(MCOperand::CreateImm(B)); in ProcessInstruction()
[all …]
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 649 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate()
659 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate()
1123 Inst.addOperand(MCOperand::CreateImm(Val)); in DecodePredicateOperand()
1172 Inst.addOperand(MCOperand::CreateImm(Op)); in DecodeSORegImmOperand()
1207 Inst.addOperand(MCOperand::CreateImm(Shift)); in DecodeSORegRegOperand()
1321 Inst.addOperand(MCOperand::CreateImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand()
1381 Inst.addOperand(MCOperand::CreateImm(coproc)); in DecodeCopMemInstruction()
1382 Inst.addOperand(MCOperand::CreateImm(CRd)); in DecodeCopMemInstruction()
1420 Inst.addOperand(MCOperand::CreateImm(imm)); in DecodeCopMemInstruction()
1443 Inst.addOperand(MCOperand::CreateImm(imm)); in DecodeCopMemInstruction()
[all …]
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| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 110 Inst.addOperand(MCOperand::CreateImm(Imm)); in decodeUImmOperand()
117 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
171 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address)); in decodePCDBLOperand()
193 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDAddr12Operand()
203 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
214 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDXAddr12Operand()
226 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
238 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDLAddr12Len8Operand()
239 Inst.addOperand(MCOperand::CreateImm(Length + 1)); in decodeBDLAddr12Len8Operand()
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1101 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
1103 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
1168 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndex1Operands()
1173 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexBOperands()
1178 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexHOperands()
1183 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexSOperands()
1188 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexDOperands()
1203 Inst.addOperand(MCOperand::CreateImm(getShiftedImmShift())); in addAddSubImmOperands()
1206 Inst.addOperand(MCOperand::CreateImm(0)); in addAddSubImmOperands()
1212 Inst.addOperand(MCOperand::CreateImm(getCondCode())); in addCondCodeOperands()
[all …]
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 587 Inst.addOperand(MCOperand::CreateImm(64 - Imm)); in DecodeFixedPointScaleImm32()
594 Inst.addOperand(MCOperand::CreateImm(64 - Imm)); in DecodeFixedPointScaleImm64()
610 Inst.addOperand(MCOperand::CreateImm(ImmVal)); in DecodePCRelLabel19()
616 Inst.addOperand(MCOperand::CreateImm((Imm >> 1) & 1)); in DecodeMemExtend()
617 Inst.addOperand(MCOperand::CreateImm(Imm & 1)); in DecodeMemExtend()
624 Inst.addOperand(MCOperand::CreateImm(Imm)); in DecodeMRSSystemRegister()
634 Inst.addOperand(MCOperand::CreateImm(Imm)); in DecodeMSRSystemRegister()
657 Inst.addOperand(MCOperand::CreateImm(1)); in DecodeFMOVLaneInstruction()
664 Inst.addOperand(MCOperand::CreateImm(Add - Imm)); in DecodeVecShiftRImm()
670 Inst.addOperand(MCOperand::CreateImm((Imm + Add) & (Add - 1))); in DecodeVecShiftLImm()
[all …]
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1753 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
1755 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
1762 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addCondCodeOperands()
1769 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocNumOperands()
1774 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocRegOperands()
1779 Inst.addOperand(MCOperand::CreateImm(CoprocOption.Val)); in addCoprocOptionOperands()
1784 Inst.addOperand(MCOperand::CreateImm(ITMask.Mask)); in addITMaskOperands()
1789 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addITCondCodeOperands()
1808 Inst.addOperand(MCOperand::CreateImm( in addRegShiftedRegOperands()
1819 Inst.addOperand(MCOperand::CreateImm( in addRegShiftedImmOperands()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonMCInstLower.cpp | 62 MCO = MCOperand::CreateImm(*Val.bitcastToAPInt().getRawData()); in HexagonLowerToMC()
66 MCO = MCOperand::CreateImm(MO.getImm()); in HexagonLowerToMC()
|
| /external/llvm/lib/Target/R600/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 93 Inst.addOperand(MCOperand::CreateImm(getImm())); in addImmOperands()
112 Inst.addOperand(MCOperand::CreateImm(Reg.Modifiers)); in addRegWithInputModsOperands()
242 static std::unique_ptr<AMDGPUOperand> CreateImm(int64_t Val, SMLoc Loc, in CreateImm() function in __anondcc3d2080111::AMDGPUOperand
600 Operands.push_back(AMDGPUOperand::CreateImm(IntVal, S)); in parseOperand()
615 AMDGPUOperand::CreateImm(F.bitcastToAPInt().getZExtValue(), S)); in parseOperand()
759 Operands.push_back(AMDGPUOperand::CreateImm(Offset, S, ImmTy)); in parseIntWithPrefix()
791 Operands.push_back(AMDGPUOperand::CreateImm(Bit, S, ImmTy)); in parseNamedBit()
835 Operands.push_back(AMDGPUOperand::CreateImm(Value, S, Op.Type)); in parseOptionalOps()
871 Operands.push_back(AMDGPUOperand::CreateImm(0, S, in parseDSOffsetOptional()
1019 Operands.push_back(AMDGPUOperand::CreateImm(CntVal, S)); in parseSWaitCntOps()
[all …]
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 280 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeMem()
358 MI.addOperand(MCOperand::CreateImm(tgt)); in DecodeCall()
365 MI.addOperand(MCOperand::CreateImm(tgt)); in DecodeSIMM13()
394 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeJMPL()
422 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeReturn()
456 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeSWAP()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.cpp | 39 NopInst.addOperand(MCOperand::CreateImm(0)); in getNoopForMachoTarget()
40 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
46 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 360 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
412 Inst.addOperand(MCOperand::CreateImm(getMemScale())); in addMemOperands()
422 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addAbsMemOperands()
441 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addMemOffsOperands()
468 static std::unique_ptr<X86Operand> CreateImm(const MCExpr *Val, in CreateImm() function
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 72 MO.push_back(MachineOperand::CreateImm(Scale)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 689 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
691 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
1060 CreateImm(const MCExpr *Val, SMLoc S, SMLoc E, MipsAsmParser &Parser) { in CreateImm() function in __anond0efcad40311::MipsOperand
1447 TmpInst.addOperand(MCOperand::CreateImm(MemOffset)); in processInstruction()
1643 tmpInst.addOperand(MCOperand::CreateImm(16)); in createShiftOr()
1660 MCOperand::CreateImm(((Value & (0xffffLL << Shift)) >> Shift)), RegNo, in createShiftOr()
1700 NopInst.addOperand(MCOperand::CreateImm(0)); in expandJalWithRegs()
1725 tmpInst.addOperand(MCOperand::CreateImm(ImmValue)); in expandLoadImm()
1733 tmpInst.addOperand(MCOperand::CreateImm(ImmValue)); in expandLoadImm()
1741 tmpInst.addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16)); in expandLoadImm()
[all …]
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 230 Inst.addOperand(MCOperand::CreateImm(Values[Val])); in DecodeBitpOperand()
236 Inst.addOperand(MCOperand::CreateImm(-(int64_t)Val)); in DecodeNegImmOperand()
365 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode2RImmInstruction()
406 Inst.addOperand(MCOperand::CreateImm(Op2)); in DecodeRUSInstruction()
555 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode3RImmInstruction()
570 Inst.addOperand(MCOperand::CreateImm(Op3)); in Decode2RUSInstruction()
626 Inst.addOperand(MCOperand::CreateImm(Op3)); in DecodeL2RUSInstruction()
|
| /external/llvm/include/llvm/MC/ |
| D | MCInstBuilder.h | 39 Inst.addOperand(MCOperand::CreateImm(Val)); in addImm()
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 265 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
267 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
309 static std::unique_ptr<SparcOperand> CreateImm(const MCExpr *Val, SMLoc S, in CreateImm() function in __anoncba7d3b40111::SparcOperand
679 Op = SparcOperand::CreateImm(EVal, S, E); in parseSparcAsmOperand()
686 Op = SparcOperand::CreateImm(EVal, S, E); in parseSparcAsmOperand()
701 Op = SparcOperand::CreateImm(Res, S, E); in parseSparcAsmOperand()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFMCInstLower.cpp | 62 MCOp = MCOperand::CreateImm(MO.getImm()); in Lower()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUMCInstLower.cpp | 48 MCOp = MCOperand::CreateImm(MO.getImm()); in lower()
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 268 Inst.addOperand(MCOperand::CreateImm(Imm)); in decodeUImmOperand()
276 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
310 Inst.addOperand(MCOperand::CreateImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
331 Inst.addOperand(MCOperand::CreateImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcMCInstLower.cpp | 80 return MCOperand::CreateImm(MO.getImm()); in LowerOperand()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 577 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp)); in addStackMapLiveVars()
578 Ops.push_back(MachineOperand::CreateImm(C->getSExtValue())); in addStackMapLiveVars()
580 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp)); in addStackMapLiveVars()
581 Ops.push_back(MachineOperand::CreateImm(0)); in addStackMapLiveVars()
623 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue())); in selectStackmap()
629 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue())); in selectStackmap()
752 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue())); in selectPatchpoint()
758 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue())); in selectPatchpoint()
775 Ops.push_back(MachineOperand::CreateImm(CalleeAddr)); in selectPatchpoint()
780 Ops.push_back(MachineOperand::CreateImm(NumCallRegArgs)); in selectPatchpoint()
[all …]
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZMCInstLower.cpp | 85 return MCOperand::CreateImm(MO.getImm()); in lowerOperand()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreMCInstLower.cpp | 92 return MCOperand::CreateImm(MO.getImm() + offset); in LowerOperand()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430MCInstLower.cpp | 130 MCOp = MCOperand::CreateImm(MO.getImm()); in Lower()
|