/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_program_tex.c | 68 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; in scale_texcoords() 69 inst_mov->U.I.DstReg.Index = temp; in scale_texcoords() 90 inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY; in projective_divide() 91 inst_rcp->U.I.DstReg.Index = temp; in projective_divide() 92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; in projective_divide() 101 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY; in projective_divide() 102 inst_mul->U.I.DstReg.Index = temp; in projective_divide() 165 struct rc_dst_register output_reg = inst->U.I.DstReg; in radeonTransformTEX() 171 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; in radeonTransformTEX() 172 inst->U.I.DstReg.Index = tmp_texsample; in radeonTransformTEX() [all …]
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D | radeon_program_alu.c | 45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) in emit1() argument 54 fpi->U.I.DstReg = DstReg; in emit1() 62 struct rc_dst_register DstReg, in emit2() argument 72 fpi->U.I.DstReg = DstReg; in emit2() 81 struct rc_dst_register DstReg, in emit3() argument 92 fpi->U.I.DstReg = DstReg; in emit3() 204 if (inst->U.I.DstReg.File != RC_FILE_TEMPORARY) in is_dst_safe_to_reuse() 209 inst->U.I.SrcReg[i].Index == inst->U.I.DstReg.Index) in is_dst_safe_to_reuse() 222 tmp = inst->U.I.DstReg.Index; in try_to_reuse_dst() 226 return dstregtmpmask(tmp, inst->U.I.DstReg.WriteMask); in try_to_reuse_dst() [all …]
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D | r3xx_vertprog.c | 194 t_dst_index(vp, &vpi->DstReg), in ei_vector1() 195 t_dst_mask(vpi->DstReg.WriteMask), in ei_vector1() 196 t_dst_class(vpi->DstReg.File)); in ei_vector1() 210 t_dst_index(vp, &vpi->DstReg), in ei_vector2() 211 t_dst_mask(vpi->DstReg.WriteMask), in ei_vector2() 212 t_dst_class(vpi->DstReg.File)); in ei_vector2() 226 t_dst_index(vp, &vpi->DstReg), in ei_math1() 227 t_dst_mask(vpi->DstReg.WriteMask), in ei_math1() 228 t_dst_class(vpi->DstReg.File)); in ei_math1() 243 t_dst_index(vp, &vpi->DstReg), in ei_lit() [all …]
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D | radeon_compiler.c | 128 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT) in rc_calculate_inputs_outputs() 129 c->Program.OutputsWritten |= 1 << inst->U.I.DstReg.Index; in rc_calculate_inputs_outputs() 180 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { in rc_move_output() 181 inst->U.I.DstReg.Index = new_output; in rc_move_output() 182 inst->U.I.DstReg.WriteMask &= writemask; in rc_move_output() 203 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { in rc_copy_output() 204 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; in rc_copy_output() 205 inst->U.I.DstReg.Index = tempreg; in rc_copy_output() 212 inst->U.I.DstReg.File = RC_FILE_OUTPUT; in rc_copy_output() 213 inst->U.I.DstReg.Index = output; in rc_copy_output() [all …]
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D | radeon_emulate_branches.c | 76 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; in handle_if() 77 inst_mov->U.I.DstReg.Index = rc_find_free_temporary(s->C); in handle_if() 78 inst_mov->U.I.DstReg.WriteMask = RC_MASK_X; in handle_if() 82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index; in handle_if() 166 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; in allocate_and_insert_proxies() 167 inst_mov->U.I.DstReg.Index = proxies->Temporary[index].Index; in allocate_and_insert_proxies() 168 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; in allocate_and_insert_proxies() 185 inst_cmp->U.I.DstReg.File = file; in inject_cmp() 186 inst_cmp->U.I.DstReg.Index = index; in inject_cmp() 187 inst_cmp->U.I.DstReg.WriteMask = RC_MASK_XYZW; in inject_cmp() [all …]
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D | radeon_pair_translate.c | 90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; in classify_instruction() 91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; in classify_instruction() 275 inst->DstReg.WriteMask); in set_pair_instruction() 284 if (inst->DstReg.File == RC_FILE_OUTPUT) { in set_pair_instruction() 285 if (inst->DstReg.Index == c->OutputDepth) { in set_pair_instruction() 286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); in set_pair_instruction() 289 if (inst->DstReg.Index == c->OutputColor[i]) { in set_pair_instruction() 293 inst->DstReg.WriteMask & RC_MASK_XYZ; in set_pair_instruction() 295 GET_BIT(inst->DstReg.WriteMask, 3); in set_pair_instruction() 302 pair->RGB.DestIndex = inst->DstReg.Index; in set_pair_instruction() [all …]
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D | radeon_vert_fc.c | 106 build_pred_dst(&new_inst->U.I.DstReg, fc_state); in lower_bgnloop() 126 build_pred_dst(&new_inst->U.I.DstReg, fc_state); in lower_bgnloop() 140 inst->U.I.DstReg.Pred = RC_PRED_INV; in lower_brk() 146 inst->U.I.DstReg.Pred = RC_PRED_SET; in lower_brk() 149 build_pred_dst(&inst->U.I.DstReg, fc_state); in lower_brk() 160 build_pred_dst(&new_inst->U.I.DstReg, fc_state); in lower_endloop() 189 inst->U.I.DstReg.Pred = RC_PRED_SET; in lower_if() 205 build_pred_dst(&inst->U.I.DstReg, fc_state); in lower_if() 248 build_pred_dst(&inst->U.I.DstReg, &fc_state); in rc_vert_fc() 260 build_pred_dst(&inst->U.I.DstReg, &fc_state); in rc_vert_fc() [all …]
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D | r3xx_fragprog.c | 61 if (inst->DstReg.File != RC_FILE_OUTPUT || inst->DstReg.Index != c->OutputDepth) in rc_rewrite_depth_out() 64 if (inst->DstReg.WriteMask & RC_MASK_Z) { in rc_rewrite_depth_out() 65 inst->DstReg.WriteMask = RC_MASK_W; in rc_rewrite_depth_out() 67 inst->DstReg.WriteMask = 0; in rc_rewrite_depth_out()
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/external/mesa3d/src/mesa/program/ |
D | programopt.c | 91 newInst[i].DstReg.File = PROGRAM_OUTPUT; in _mesa_insert_mvp_dp4_code() 92 newInst[i].DstReg.Index = VERT_RESULT_HPOS; in _mesa_insert_mvp_dp4_code() 93 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i); in _mesa_insert_mvp_dp4_code() 163 newInst[0].DstReg.File = PROGRAM_TEMPORARY; in _mesa_insert_mvp_mad_code() 164 newInst[0].DstReg.Index = hposTemp; in _mesa_insert_mvp_mad_code() 165 newInst[0].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_insert_mvp_mad_code() 175 newInst[i].DstReg.File = PROGRAM_TEMPORARY; in _mesa_insert_mvp_mad_code() 176 newInst[i].DstReg.Index = hposTemp; in _mesa_insert_mvp_mad_code() 177 newInst[i].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_insert_mvp_mad_code() 190 newInst[3].DstReg.File = PROGRAM_OUTPUT; in _mesa_insert_mvp_mad_code() [all …]
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D | prog_optimize.c | 88 channel_mask = inst->DstReg.WriteMask & dst_mask; in get_src_arg_mask() 134 const GLuint mask = mov->DstReg.WriteMask; in get_dst_mask_for_mov() 234 if (inst->DstReg.File == file) { in replace_regs() 235 const GLuint index = inst->DstReg.Index; in replace_regs() 237 inst->DstReg.Index = map[index]; in replace_regs() 298 if (inst->DstReg.File == PROGRAM_TEMPORARY) { in _mesa_remove_dead_code_global() 299 const GLuint index = inst->DstReg.Index; in _mesa_remove_dead_code_global() 302 if (inst->DstReg.RelAddr) { in _mesa_remove_dead_code_global() 326 if (numDst != 0 && inst->DstReg.File == PROGRAM_TEMPORARY) { in _mesa_remove_dead_code_global() 327 GLint chan, index = inst->DstReg.Index; in _mesa_remove_dead_code_global() [all …]
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D | prog_instruction.c | 53 inst[i].DstReg.File = PROGRAM_UNDEFINED; in _mesa_init_instructions() 54 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_init_instructions() 55 inst[i].DstReg.CondMask = COND_TR; in _mesa_init_instructions() 56 inst[i].DstReg.CondSwizzle = SWIZZLE_NOOP; in _mesa_init_instructions() 307 if (inst->DstReg.WriteMask == WRITEMASK_X || in _mesa_check_soa_dependencies() 308 inst->DstReg.WriteMask == WRITEMASK_Y || in _mesa_check_soa_dependencies() 309 inst->DstReg.WriteMask == WRITEMASK_Z || in _mesa_check_soa_dependencies() 310 inst->DstReg.WriteMask == WRITEMASK_W || in _mesa_check_soa_dependencies() 311 inst->DstReg.WriteMask == 0x0) { in _mesa_check_soa_dependencies() 318 if (inst->SrcReg[i].File == inst->DstReg.File && in _mesa_check_soa_dependencies() [all …]
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D | prog_print.c | 646 if (inst->DstReg.File != PROGRAM_UNDEFINED) { in _mesa_fprint_alu_instruction() 647 fprint_dst_reg(f, &inst->DstReg, mode, prog); in _mesa_fprint_alu_instruction() 717 fprint_dst_reg(f, &inst->DstReg, mode, prog); in _mesa_fprint_instruction_opt() 734 fprint_dst_reg(f, &inst->DstReg, mode, prog); in _mesa_fprint_instruction_opt() 770 _mesa_condcode_string(inst->DstReg.CondMask), in _mesa_fprint_instruction_opt() 771 _mesa_swizzle_string(inst->DstReg.CondSwizzle, in _mesa_fprint_instruction_opt() 778 fprint_dst_reg(f, &inst->DstReg, mode, prog); in _mesa_fprint_instruction_opt() 786 _mesa_condcode_string(inst->DstReg.CondMask), in _mesa_fprint_instruction_opt() 787 _mesa_swizzle_string(inst->DstReg.CondSwizzle, 0, GL_FALSE)); in _mesa_fprint_instruction_opt() 800 _mesa_condcode_string(inst->DstReg.CondMask), in _mesa_fprint_instruction_opt() [all …]
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/external/llvm/lib/Target/R600/ |
D | R600ExpandSpecialInstrs.cpp | 126 unsigned DstReg; in runOnMachineFunction() local 129 DstReg = MI.getOperand(Chan).getReg(); in runOnMachineFunction() 131 DstReg = Chan == 2 ? AMDGPU::T0_Z : AMDGPU::T0_W; in runOnMachineFunction() 134 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg); in runOnMachineFunction() 155 unsigned DstReg; in runOnMachineFunction() local 158 DstReg = Chan == 0 ? AMDGPU::T0_X : AMDGPU::T0_Y; in runOnMachineFunction() 160 DstReg = MI.getOperand(Chan-2).getReg(); in runOnMachineFunction() 163 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg); in runOnMachineFunction() 183 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local 187 TRI.getSubReg(DstReg, TRI.getSubRegFromChannel(Chan)), PReg); in runOnMachineFunction() [all …]
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_atom_pixeltransfer.c | 163 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program() 164 inst[ic].DstReg.Index = colorTemp; in get_pixel_transfer_program() 187 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program() 188 inst[ic].DstReg.Index = colorTemp; in get_pixel_transfer_program() 216 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program() 217 inst[ic].DstReg.Index = temp; in get_pixel_transfer_program() 218 inst[ic].DstReg.WriteMask = WRITEMASK_XY; /* write R,G */ in get_pixel_transfer_program() 228 inst[ic].DstReg.File = PROGRAM_TEMPORARY; in get_pixel_transfer_program() 229 inst[ic].DstReg.Index = temp; in get_pixel_transfer_program() 230 inst[ic].DstReg.WriteMask = WRITEMASK_ZW; /* write B,A */ in get_pixel_transfer_program() [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonPeephole.cpp | 140 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 143 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction() 148 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction() 162 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 164 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction() 179 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 181 PeepholeDoubleRegsMap[DstReg] = in runOnMachineFunction() 191 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local 194 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction() 199 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction() [all …]
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | R600ExpandSpecialInstrs.cpp | 96 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local 120 DstReg = TRI.getSubReg(DstReg, SubRegIndex); in runOnMachineFunction() 124 Flags |= (Chan != TRI.getHWRegChan(DstReg) ? MO_FLAG_MASK : 0); in runOnMachineFunction() 125 unsigned DstBase = TRI.getHWRegIndex(DstReg); in runOnMachineFunction() 126 DstReg = AMDGPU::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction() 151 BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(Opcode), DstReg) in runOnMachineFunction()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ExpandPseudoInsts.cpp | 106 const unsigned DstReg = MI.getOperand(0).getReg(); in tryOrrMovk() local 110 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryOrrMovk() 111 .addReg(DstReg) in tryOrrMovk() 171 const unsigned DstReg = MI.getOperand(0).getReg(); in tryToreplicateChunks() local 187 .addReg(DstReg, in tryToreplicateChunks() 189 .addReg(DstReg) in tryToreplicateChunks() 212 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks() 213 .addReg(DstReg) in tryToreplicateChunks() 354 const unsigned DstReg = MI.getOperand(0).getReg(); in trySequenceOfOnes() local 361 .addReg(DstReg, in trySequenceOfOnes() [all …]
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
D | rc_test_helpers.c | 241 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; in init_rc_normal_dst() 243 inst->U.I.DstReg.File = RC_FILE_OUTPUT; in init_rc_normal_dst() 251 inst->U.I.DstReg.Index = strtol(tokens.Index.String, NULL, 10); in init_rc_normal_dst() 260 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in init_rc_normal_dst() 270 inst->U.I.DstReg.WriteMask |= RC_MASK_X; in init_rc_normal_dst() 273 inst->U.I.DstReg.WriteMask |= RC_MASK_Y; in init_rc_normal_dst() 276 inst->U.I.DstReg.WriteMask |= RC_MASK_Z; in init_rc_normal_dst() 279 inst->U.I.DstReg.WriteMask |= RC_MASK_W; in init_rc_normal_dst() 288 inst->U.I.DstReg.File, in init_rc_normal_dst() 289 inst->U.I.DstReg.Index, in init_rc_normal_dst() [all …]
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/external/llvm/lib/CodeGen/ |
D | RegisterCoalescer.h | 33 unsigned DstReg; variable 61 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0), in CoalescerPair() 68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), in CoalescerPair() 100 unsigned getDstReg() const { return DstReg; } in getDstReg()
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D | TwoAddressInstructionPass.cpp | 136 void scanUses(unsigned DstReg); 382 unsigned &SrcReg, unsigned &DstReg, in isCopyToReg() argument 385 DstReg = 0; in isCopyToReg() 387 DstReg = MI.getOperand(0).getReg(); in isCopyToReg() 390 DstReg = MI.getOperand(0).getReg(); in isCopyToReg() 396 IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg); in isCopyToReg() 466 unsigned SrcReg, DstReg; in isKilled() local 469 if (!isCopyToReg(*DefMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) in isKilled() 477 static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { in isTwoAddrUse() argument 484 DstReg = MI.getOperand(ti).getReg(); in isTwoAddrUse() [all …]
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D | RegisterCoalescer.cpp | 207 void updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx); 294 SrcReg = DstReg = 0; in setRegisters() 377 DstReg = Dst; in setRegisters() 382 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) in flip() 384 std::swap(SrcReg, DstReg); in flip() 406 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) { in isCoalescable() 415 return DstReg == Dst; in isCoalescable() 417 return TRI.getSubReg(DstReg, SrcSub) == Dst; in isCoalescable() 420 if (DstReg != Dst) in isCoalescable() 860 unsigned DstReg = CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg(); in reMaterializeTrivialDef() local [all …]
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D | OptimizePHIs.cpp | 92 unsigned DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local 105 if (SrcReg == DstReg) in IsSingleValuePHICycle() 135 unsigned DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local 136 assert(TargetRegisterInfo::isVirtualRegister(DstReg) && in IsDeadPHICycle() 147 for (MachineInstr &UseMI : MRI->use_instructions(DstReg)) { in IsDeadPHICycle()
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D | ExpandPostRAPseudos.cpp | 87 unsigned DstReg = MI->getOperand(0).getReg(); in LowerSubregToReg() local 93 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx); in LowerSubregToReg() 95 assert(TargetRegisterInfo::isPhysicalRegister(DstReg) && in LowerSubregToReg() 113 if (DstReg != InsReg) { in LowerSubregToReg() 128 CopyMI->addRegisterDefined(DstReg); in LowerSubregToReg()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430RegisterInfo.cpp | 143 unsigned DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local 145 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::SUB16ri), DstReg) in eliminateFrameIndex() 146 .addReg(DstReg).addImm(-Offset); in eliminateFrameIndex() 148 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::ADD16ri), DstReg) in eliminateFrameIndex() 149 .addReg(DstReg).addImm(Offset); in eliminateFrameIndex()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEInstrInfo.cpp | 480 unsigned DstReg = I->getOperand(0).getReg(); in expandPseudoMTLoHi() local 481 unsigned DstLo = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandPseudoMTLoHi() 482 unsigned DstHi = getRegisterInfo().getSubReg(DstReg, Mips::sub_hi); in expandPseudoMTLoHi() 494 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local 503 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandCvtFPInt() 506 DstReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandCvtFPInt() 509 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill); in expandCvtFPInt() 515 unsigned DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local 545 BuildMI(MBB, I, dl, get(FP64 ? Mips::MFHC1_D64 : Mips::MFHC1_D32), DstReg) in expandExtractElementF64() 548 BuildMI(MBB, I, dl, get(Mips::MFC1), DstReg).addReg(SubReg); in expandExtractElementF64() [all …]
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