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Searched refs:Expand (Results 1 – 25 of 135) sorted by relevance

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/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp111 setOperationAction(ISD::SUBE, VT, Expand); in InitAMDILLowering()
112 setOperationAction(ISD::SUBC, VT, Expand); in InitAMDILLowering()
113 setOperationAction(ISD::ADDE, VT, Expand); in InitAMDILLowering()
114 setOperationAction(ISD::ADDC, VT, Expand); in InitAMDILLowering()
116 setOperationAction(ISD::BR_JT, VT, Expand); in InitAMDILLowering()
117 setOperationAction(ISD::BRIND, VT, Expand); in InitAMDILLowering()
119 setOperationAction(ISD::SREM, VT, Expand); in InitAMDILLowering()
120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
121 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
130 setOperationAction(ISD::FP_ROUND_INREG, VT, Expand); in InitAMDILLowering()
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/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1294 setOperationAction(ISD::SELECT, VT, Expand); in HexagonTargetLowering()
1295 setOperationAction(ISD::SDIV, VT, Expand); in HexagonTargetLowering()
1296 setOperationAction(ISD::SREM, VT, Expand); in HexagonTargetLowering()
1297 setOperationAction(ISD::UDIV, VT, Expand); in HexagonTargetLowering()
1298 setOperationAction(ISD::UREM, VT, Expand); in HexagonTargetLowering()
1299 setOperationAction(ISD::ROTL, VT, Expand); in HexagonTargetLowering()
1300 setOperationAction(ISD::ROTR, VT, Expand); in HexagonTargetLowering()
1301 setOperationAction(ISD::FDIV, VT, Expand); in HexagonTargetLowering()
1302 setOperationAction(ISD::FNEG, VT, Expand); in HexagonTargetLowering()
1303 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in HexagonTargetLowering()
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/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp104 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in BPFTargetLowering()
105 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
106 setOperationAction(ISD::SETCC, MVT::i64, Expand); in BPFTargetLowering()
107 setOperationAction(ISD::SELECT, MVT::i64, Expand); in BPFTargetLowering()
113 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in BPFTargetLowering()
114 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in BPFTargetLowering()
116 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in BPFTargetLowering()
117 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in BPFTargetLowering()
118 setOperationAction(ISD::SREM, MVT::i64, Expand); in BPFTargetLowering()
119 setOperationAction(ISD::UREM, MVT::i64, Expand); in BPFTargetLowering()
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/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp88 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
89 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
93 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in MSP430TargetLowering()
101 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
102 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
103 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
104 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering()
108 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MSP430TargetLowering()
111 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
114 setOperationAction(ISD::SELECT, MVT::i8, Expand); in MSP430TargetLowering()
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/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp113 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in AMDGPUTargetLowering()
114 setOperationAction(ISD::BRIND, MVT::Other, Expand); in AMDGPUTargetLowering()
143 setOperationAction(ISD::FSUB, MVT::f64, Expand); in AMDGPUTargetLowering()
178 setTruncStoreAction(MVT::v4i32, MVT::v4i16, Expand); in AMDGPUTargetLowering()
180 setTruncStoreAction(MVT::i64, MVT::i16, Expand); in AMDGPUTargetLowering()
181 setTruncStoreAction(MVT::i64, MVT::i8, Expand); in AMDGPUTargetLowering()
182 setTruncStoreAction(MVT::i64, MVT::i1, Expand); in AMDGPUTargetLowering()
183 setTruncStoreAction(MVT::v2i64, MVT::v2i1, Expand); in AMDGPUTargetLowering()
184 setTruncStoreAction(MVT::v4i64, MVT::v4i1, Expand); in AMDGPUTargetLowering()
222 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
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DR600ISelLowering.cpp46 setCondCodeAction(ISD::SETO, MVT::f32, Expand); in R600TargetLowering()
47 setCondCodeAction(ISD::SETUO, MVT::f32, Expand); in R600TargetLowering()
48 setCondCodeAction(ISD::SETLT, MVT::f32, Expand); in R600TargetLowering()
49 setCondCodeAction(ISD::SETLE, MVT::f32, Expand); in R600TargetLowering()
50 setCondCodeAction(ISD::SETOLT, MVT::f32, Expand); in R600TargetLowering()
51 setCondCodeAction(ISD::SETOLE, MVT::f32, Expand); in R600TargetLowering()
52 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in R600TargetLowering()
53 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand); in R600TargetLowering()
54 setCondCodeAction(ISD::SETUGE, MVT::f32, Expand); in R600TargetLowering()
55 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); in R600TargetLowering()
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DSIISelLowering.cpp65 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand); in SITargetLowering()
66 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand); in SITargetLowering()
67 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i32, Expand); in SITargetLowering()
68 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16f32, Expand); in SITargetLowering()
97 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in SITargetLowering()
98 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in SITargetLowering()
99 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in SITargetLowering()
100 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); in SITargetLowering()
102 setOperationAction(ISD::SETCC, MVT::v2i1, Expand); in SITargetLowering()
103 setOperationAction(ISD::SETCC, MVT::v4i1, Expand); in SITargetLowering()
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/external/v8/src/
Dregexp-macro-assembler-irregexp-inl.h26 Expand(); in Emit()
36 Expand(); in Emit16()
46 Expand(); in Emit8()
56 Expand(); in Emit32()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1382 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in SparcTargetLowering()
1383 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f64, Expand); in SparcTargetLowering()
1391 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in SparcTargetLowering()
1392 setTruncStoreAction(MVT::f128, MVT::f32, Expand); in SparcTargetLowering()
1393 setTruncStoreAction(MVT::f128, MVT::f64, Expand); in SparcTargetLowering()
1402 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); in SparcTargetLowering()
1403 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); in SparcTargetLowering()
1404 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); in SparcTargetLowering()
1407 setOperationAction(ISD::UREM, MVT::i32, Expand); in SparcTargetLowering()
1408 setOperationAction(ISD::SREM, MVT::i32, Expand); in SparcTargetLowering()
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/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp133 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); in Mips16TargetLowering()
134 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
135 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
136 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
137 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); in Mips16TargetLowering()
138 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in Mips16TargetLowering()
139 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand); in Mips16TargetLowering()
140 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand); in Mips16TargetLowering()
141 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering()
142 setOperationAction(ISD::ATOMIC_LOAD_MIN, MVT::i32, Expand); in Mips16TargetLowering()
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DMipsISelLowering.cpp227 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in MipsTargetLowering()
228 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); in MipsTargetLowering()
235 setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand); in MipsTargetLowering()
238 setTruncStoreAction(MVT::f32, MVT::f16, Expand); in MipsTargetLowering()
239 setTruncStoreAction(MVT::f64, MVT::f16, Expand); in MipsTargetLowering()
241 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in MipsTargetLowering()
293 setOperationAction(ISD::SDIV, MVT::i32, Expand); in MipsTargetLowering()
294 setOperationAction(ISD::SREM, MVT::i32, Expand); in MipsTargetLowering()
295 setOperationAction(ISD::UDIV, MVT::i32, Expand); in MipsTargetLowering()
296 setOperationAction(ISD::UREM, MVT::i32, Expand); in MipsTargetLowering()
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DMipsSEISelLowering.cpp51 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
52 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
53 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
54 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
67 setOperationAction(Opc, VecTys[i], Expand); in MipsSETargetLowering()
158 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in MipsSETargetLowering()
159 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in MipsSETargetLowering()
166 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
167 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
177 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in MipsSETargetLowering()
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/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp793 setIndexedLoadAction(IM, VT, Expand); in initActions()
794 setIndexedStoreAction(IM, VT, Expand); in initActions()
798 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Expand); in initActions()
801 setOperationAction(ISD::FGETSIGN, VT, Expand); in initActions()
802 setOperationAction(ISD::CONCAT_VECTORS, VT, Expand); in initActions()
803 setOperationAction(ISD::FMINNUM, VT, Expand); in initActions()
804 setOperationAction(ISD::FMAXNUM, VT, Expand); in initActions()
805 setOperationAction(ISD::FMAD, VT, Expand); in initActions()
808 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
812 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in initActions()
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/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp131 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in AArch64TargetLowering()
144 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in AArch64TargetLowering()
151 setOperationAction(ISD::FREM, MVT::f32, Expand); in AArch64TargetLowering()
152 setOperationAction(ISD::FREM, MVT::f64, Expand); in AArch64TargetLowering()
153 setOperationAction(ISD::FREM, MVT::f80, Expand); in AArch64TargetLowering()
162 setOperationAction(ISD::FABS, MVT::f128, Expand); in AArch64TargetLowering()
164 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in AArch64TargetLowering()
165 setOperationAction(ISD::FCOS, MVT::f128, Expand); in AArch64TargetLowering()
167 setOperationAction(ISD::FMA, MVT::f128, Expand); in AArch64TargetLowering()
169 setOperationAction(ISD::FNEG, MVT::f128, Expand); in AArch64TargetLowering()
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/external/ppp/pppd/
Dpppcrypt.c97 Expand(in, out) in Expand() function
139 Expand(des_key, crypt_key);
154 Expand(clear, des_input);
170 Expand(cipher, des_input);
/external/openfst/src/include/fst/
Drmepsilon.h84 void Expand(StateId s);
160 void RmEpsilonState<Arc,Queue>::Expand(typename Arc::StateId source) { in Expand() function
299 rmeps_state.Expand(state); in RmEpsilon()
441 Expand(s); in Final()
448 Expand(s); in NumArcs()
454 Expand(s); in NumInputEpsilons()
460 Expand(s); in NumOutputEpsilons()
476 Expand(s); in InitArcIterator()
480 void Expand(StateId s) { in Expand() function
481 rmeps_state_.Expand(s); in Expand()
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Dcompact-fst.h293 Arc arc = compactor.Expand(ncompacts_ - 1, in CompactFstData()
314 if (compactor.Expand(i, *it).ilabel != kNoLabel) in CompactFstData()
326 Arc arc = compactor.Expand(i, *it); in CompactFstData()
342 Arc arc = compactor.Expand(i, *it); in CompactFstData()
587 Expand(s); in NumInputEpsilons()
595 Expand(s); in NumOutputEpsilons()
670 Expand(s); in InitArcIterator()
675 return compactor_->Expand(s, data_->Compacts(i), f);
678 void Expand(StateId s) { in Expand() function
1077 arc_ = compactor_->Expand(s, *compacts_, kArcILabelValue); in ArcIterator()
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Dsynchronize.h142 Expand(s); in NumArcs()
148 Expand(s); in NumInputEpsilons()
154 Expand(s); in NumOutputEpsilons()
169 Expand(s); in InitArcIterator()
239 void Expand(StateId s) { in Expand() function
414 fst.GetImpl()->Expand(s); in ArcIterator()
Dfactor-weight.h248 Expand(s); in NumArcs()
254 Expand(s); in NumInputEpsilons()
260 Expand(s); in NumOutputEpsilons()
275 Expand(s); in InitArcIterator()
306 void Expand(StateId s) { in Expand() function
459 fst.GetImpl()->Expand(s); in ArcIterator()
Drelabel.h308 Expand(s); in NumArcs()
315 Expand(s); in NumInputEpsilons()
322 Expand(s); in NumOutputEpsilons()
338 Expand(s); in InitArcIterator()
343 void Expand(StateId s) { in Expand() function
511 fst.GetImpl()->Expand(s); in ArcIterator()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp80 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in PPCTargetLowering()
83 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in PPCTargetLowering()
102 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in PPCTargetLowering()
127 setTruncStoreAction(VT, MVT::i1, Expand); in PPCTargetLowering()
138 setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand); in PPCTargetLowering()
139 setOperationAction(ISD::FCEIL, MVT::ppcf128, Expand); in PPCTargetLowering()
140 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); in PPCTargetLowering()
141 setOperationAction(ISD::FRINT, MVT::ppcf128, Expand); in PPCTargetLowering()
142 setOperationAction(ISD::FNEARBYINT, MVT::ppcf128, Expand); in PPCTargetLowering()
143 setOperationAction(ISD::FREM, MVT::ppcf128, Expand); in PPCTargetLowering()
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/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp66 SDValue Expand(SDValue Op);
224 case TargetLowering::Expand: in LegalizeOp()
242 case TargetLowering::Expand: in LegalizeOp()
350 case TargetLowering::Expand: in LegalizeOp()
351 Result = Expand(Op); in LegalizeOp()
676 SDValue VectorLegalizer::Expand(SDValue Op) { in Expand() function in __anon741ec2090111::VectorLegalizer
724 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand || in ExpandSELECT()
725 TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand || in ExpandSELECT()
726 TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand || in ExpandSELECT()
727 TLI.getOperationAction(ISD::BUILD_VECTOR, VT) == TargetLowering::Expand) in ExpandSELECT()
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/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp114 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addTypeForNEON()
115 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON()
116 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in addTypeForNEON()
117 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
123 setOperationAction(ISD::SELECT, VT, Expand); in addTypeForNEON()
124 setOperationAction(ISD::SELECT_CC, VT, Expand); in addTypeForNEON()
125 setOperationAction(ISD::VSELECT, VT, Expand); in addTypeForNEON()
126 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand); in addTypeForNEON()
144 setOperationAction(ISD::SDIV, VT, Expand); in addTypeForNEON()
145 setOperationAction(ISD::UDIV, VT, Expand); in addTypeForNEON()
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/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp141 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in NVPTXTargetLowering()
142 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); in NVPTXTargetLowering()
143 setOperationAction(ISD::SELECT_CC, MVT::i1, Expand); in NVPTXTargetLowering()
144 setOperationAction(ISD::SELECT_CC, MVT::i8, Expand); in NVPTXTargetLowering()
145 setOperationAction(ISD::SELECT_CC, MVT::i16, Expand); in NVPTXTargetLowering()
146 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in NVPTXTargetLowering()
147 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in NVPTXTargetLowering()
148 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in NVPTXTargetLowering()
149 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in NVPTXTargetLowering()
150 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in NVPTXTargetLowering()
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/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp93 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in XCoreTargetLowering()
94 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in XCoreTargetLowering()
95 setOperationAction(ISD::ADDC, MVT::i32, Expand); in XCoreTargetLowering()
96 setOperationAction(ISD::ADDE, MVT::i32, Expand); in XCoreTargetLowering()
97 setOperationAction(ISD::SUBC, MVT::i32, Expand); in XCoreTargetLowering()
98 setOperationAction(ISD::SUBE, MVT::i32, Expand); in XCoreTargetLowering()
105 setOperationAction(ISD::MULHS, MVT::i32, Expand); in XCoreTargetLowering()
106 setOperationAction(ISD::MULHU, MVT::i32, Expand); in XCoreTargetLowering()
107 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
108 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
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