| /external/strace/xlat/ |
| D | open_mode_flags.h | 91 #if defined(FTRUNC) || (defined(HAVE_DECL_FTRUNC) && HAVE_DECL_FTRUNC)
92 XLAT(FTRUNC),
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| D | open_mode_flags.in | 34 FTRUNC
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 499 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 602 ISD = ISD::FTRUNC; in getIntrinsicInstrCost()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 289 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in mightUseCTR()
351 Opcode = ISD::FTRUNC; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 140 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); in PPCTargetLowering()
199 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in PPCTargetLowering()
204 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in PPCTargetLowering()
457 setOperationAction(ISD::FTRUNC, VT, Expand); in PPCTargetLowering()
503 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
548 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in PPCTargetLowering()
753 setOperationAction(ISD::FTRUNC, MVT::v4f64, Legal); in PPCTargetLowering()
758 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 128 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in AMDGPUTargetLowering()
246 setOperationAction(ISD::FTRUNC, MVT::f64, Custom); in AMDGPUTargetLowering()
372 setOperationAction(ISD::FTRUNC, VT, Expand); in AMDGPUTargetLowering()
613 case ISD::FTRUNC: return LowerFTRUNC(Op, DAG); in LowerOperation()
1036 return DAG.getNode(ISD::FTRUNC, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
1596 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq); in LowerDIVREM24()
1902 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div); in LowerFREM()
1916 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
2030 SDValue T = DAG.getNode(ISD::FTRUNC, SL, MVT::f32, X); in LowerFROUND32()
2126 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFFLOOR()
[all …]
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| D | SIISelLowering.cpp | 201 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in SITargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 152 case ISD::FTRUNC: return "ftrunc"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 99 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
912 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
1749 case ISD::FTRUNC: R = PromoteFloatRes_UnaryOp(N); break; in PromoteFloatResult()
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| D | LegalizeVectorTypes.cpp | 94 case ISD::FTRUNC: in ScalarizeVectorResult()
636 case ISD::FTRUNC: in SplitVectorResult()
1331 case ISD::FTRUNC: in SplitVectorOperand()
1814 case ISD::FTRUNC: in WidenVectorResult()
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| D | LegalizeVectorOps.cpp | 312 case ISD::FTRUNC: in LegalizeOp()
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| D | LegalizeDAG.cpp | 3353 case ISD::FTRUNC: in ExpandNode()
4246 case ISD::FTRUNC: in PromoteNode()
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| D | SelectionDAG.cpp | 2801 case ISD::FTRUNC: { in getNode()
2861 case ISD::FTRUNC: in getNode()
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| D | SelectionDAGBuilder.cpp | 5001 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in visitIntrinsicCall()
6048 if (visitUnaryFloatCall(I, ISD::FTRUNC)) in visitCall()
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| D | DAGCombiner.cpp | 1369 case ISD::FTRUNC: return visitFTRUNC(N); in visit()
8219 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0); in visitFTRUNC()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 536 fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq); in LowerSDIV24()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 177 setOperationAction(ISD::FTRUNC, MVT::f128, Expand); in AArch64TargetLowering()
314 setOperationAction(ISD::FTRUNC, MVT::f16, Promote); in AArch64TargetLowering()
352 setOperationAction(ISD::FTRUNC, MVT::v4f16, Expand); in AArch64TargetLowering()
385 setOperationAction(ISD::FTRUNC, MVT::v8f16, Expand); in AArch64TargetLowering()
403 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
539 setOperationAction(ISD::FTRUNC, MVT::v1f64, Expand); in AArch64TargetLowering()
611 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
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| D | AArch64ISelDAGToDAG.cpp | 2030 case ISD::FTRUNC: { in SelectLIBM()
3076 case ISD::FTRUNC: in Select()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 844 setOperationAction(ISD::FTRUNC, VT, Expand); in initActions()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 476 setOperationAction(ISD::FTRUNC, MVT::v2f64, Expand); in ARMTargetLowering()
493 setOperationAction(ISD::FTRUNC, MVT::v4f32, Expand); in ARMTargetLowering()
510 setOperationAction(ISD::FTRUNC, MVT::v2f32, Expand); in ARMTargetLowering()
614 setOperationAction(ISD::FTRUNC, MVT::f64, Expand); in ARMTargetLowering()
909 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in ARMTargetLowering()
916 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in ARMTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 409 def ftrunc : SDNode<"ISD::FTRUNC" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 646 setOperationAction(ISD::FTRUNC, MVT::f80, Expand); in X86TargetLowering()
699 setOperationAction(ISD::FTRUNC, VT, Expand); in X86TargetLowering()
944 setOperationAction(ISD::FTRUNC, RoundedTy, Legal); in X86TargetLowering()
1041 setOperationAction(ISD::FTRUNC, MVT::v8f32, Legal); in X86TargetLowering()
1054 setOperationAction(ISD::FTRUNC, MVT::v4f64, Legal); in X86TargetLowering()
1325 setOperationAction(ISD::FTRUNC, MVT::v16f32, Legal); in X86TargetLowering()
1326 setOperationAction(ISD::FTRUNC, MVT::v8f64, Legal); in X86TargetLowering()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 267 setOperationAction(ISD::FTRUNC, VT, Legal); in SystemZTargetLowering()
|