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Searched refs:IsLE (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3591 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3592 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3593 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3594 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3595 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3596 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3598 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3599 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3600 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3601 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
[all …]
DMipsInstrInfo.td199 def IsLE : Predicate<"Subtarget->isLittle()">;
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td27 def IsLE : Predicate<"Subtarget->isLittleEndian()">;
1266 let Predicates = [IsLE] in {
1279 let Predicates = [IsLE] in {
1406 let Predicates = [IsLE] in {
1425 let Predicates = [IsLE] in {
1568 let Predicates = [IsLE] in {
1586 let Predicates = [IsLE] in {
1891 let Predicates = [IsLE] in {
1904 let Predicates = [IsLE] in {
1976 let Predicates = [IsLE] in {
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td2358 (VLD1d16 addrmode6:$addr)>, Requires<[IsLE]>;
2360 (VST1d16 addrmode6:$addr, DPR:$value)>, Requires<[IsLE]>;
2362 (VLD1d8 addrmode6:$addr)>, Requires<[IsLE]>;
2364 (VST1d8 addrmode6:$addr, DPR:$value)>, Requires<[IsLE]>;
2377 (VLD1q32 addrmode6:$addr)>, Requires<[IsLE]>;
2379 (VST1q32 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>;
2381 (VLD1q16 addrmode6:$addr)>, Requires<[IsLE]>;
2383 (VST1q16 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>;
2385 (VLD1q8 addrmode6:$addr)>, Requires<[IsLE]>;
2387 (VST1q8 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>;
[all …]
DARMInstrThumb.td1383 Requires<[IsThumb, IsThumb1Only, IsLE]>;
1385 Requires<[IsThumb, IsThumb1Only, IsLE]>;
1387 Requires<[IsThumb, IsThumb1Only, IsLE]>;
DARMInstrInfo.td310 def IsLE : Predicate<"getTargetLowering()->isLittleEndian()">;
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp1087 bool IsLE = DAG.getTarget().getDataLayout()->isLittleEndian(); in isVPKUHUMShuffleMask() local
1089 if (IsLE) in isVPKUHUMShuffleMask()
1095 if (!IsLE) in isVPKUHUMShuffleMask()
1101 unsigned j = IsLE ? 0 : 1; in isVPKUHUMShuffleMask()
1118 bool IsLE = DAG.getTarget().getDataLayout()->isLittleEndian(); in isVPKUWUMShuffleMask() local
1120 if (IsLE) in isVPKUWUMShuffleMask()
1127 if (!IsLE) in isVPKUWUMShuffleMask()
1134 unsigned j = IsLE ? 0 : 2; in isVPKUWUMShuffleMask()
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp10116 bool IsLE = TLI.isLittleEndian(); in MergeStoresOfConstantsOrVecElts() local
10118 unsigned Idx = IsLE ? (NumElem - 1 - i) : i; in MergeStoresOfConstantsOrVecElts()