| /external/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 216 const LiveRange &LR, unsigned Reg, unsigned LaneMask);
218 const LiveRange &LR, unsigned Reg, unsigned LaneMask);
236 void verifyLiveRange(const LiveRange&, unsigned, unsigned LaneMask = 0);
418 unsigned LaneMask) { in report() argument
422 if (LaneMask != 0) in report()
423 errs() << "- lanemask: " << format("%04X\n", LaneMask); in report()
428 unsigned LaneMask) { in report() argument
432 if (LaneMask != 0) in report()
433 errs() << "- lanemask: " << format("%04X\n", LaneMask); in report()
1380 unsigned LaneMask) { in verifyLiveRangeValue() argument
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| D | RegisterCoalescer.cpp | 169 unsigned LaneMask, CoalescerPair &CP);
175 unsigned LaneMask, const CoalescerPair &CP);
789 unsigned AMask = SA.LaneMask; in removeCopyByCommutingDef()
791 unsigned BMask = SB.LaneMask; in removeCopyByCommutingDef()
801 SB.LaneMask = BRest; in removeCopyByCommutingDef()
807 SB.LaneMask = Common; in removeCopyByCommutingDef()
1065 if ((SR.LaneMask & SrcMask) == 0) in eliminateUndefCopy()
1086 if ((SR.LaneMask & DstMask) == 0) in eliminateUndefCopy()
1108 if ((SR.LaneMask & UseMask) == 0) in eliminateUndefCopy()
1179 if ((S.LaneMask & Mask) == 0) in updateRegDefsUses()
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| D | LiveIntervalAnalysis.cpp | 516 if ((SubRegMask & SR.LaneMask) == 0) in shrinkToUses()
728 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
947 unsigned LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in updateAllRanges() local
949 if ((S.LaneMask & LaneMask) == 0) in updateAllRanges()
951 updateRange(S, Reg, S.LaneMask); in updateAllRanges()
971 void updateRange(LiveRange &LR, unsigned Reg, unsigned LaneMask) { in updateRange() argument
978 if (LaneMask != 0) in updateRange()
979 dbgs() << format(" L%04X", LaneMask); in updateRange()
988 handleMoveUp(LR, Reg, LaneMask); in updateRange()
1101 void handleMoveUp(LiveRange &LR, unsigned Reg, unsigned LaneMask) { in handleMoveUp() argument
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| D | LiveRangeCalc.cpp | 79 unsigned Common = S.LaneMask & Mask; in calculate()
83 unsigned LRest = S.LaneMask & ~Mask; in calculate()
87 S.LaneMask = LRest; in calculate()
90 assert(Common == S.LaneMask); in calculate()
120 extendToUses(S, Reg, S.LaneMask); in calculate()
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| D | LiveInterval.cpp | 915 (I->end == Pos && (ActiveMask & SR.LaneMask) == 0))) in constructMainRangeFromSubranges()
919 if ((ActiveMask & SR.LaneMask) == 0 && in constructMainRangeFromSubranges()
923 EventMask |= SR.LaneMask; in constructMainRangeFromSubranges()
928 EventMask = SR.LaneMask; in constructMainRangeFromSubranges()
932 if ((ActiveMask & SR.LaneMask) != 0 && in constructMainRangeFromSubranges()
936 EventMask |= SR.LaneMask; in constructMainRangeFromSubranges()
940 EventMask = SR.LaneMask; in constructMainRangeFromSubranges()
1069 OS << format(" L%04X ", SR.LaneMask) << SR; in print()
1108 assert((Mask & SR.LaneMask) == 0); in verify()
1109 Mask |= SR.LaneMask; in verify()
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| D | LiveRangeCalc.h | 132 void extendToUses(LiveRange &LR, unsigned Reg, unsigned LaneMask);
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| D | LiveRegMatrix.cpp | 83 if (S.LaneMask & Mask) { in foreachUnit()
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| D | VirtRegMap.cpp | 264 if ((SubRegLaneMask & S.LaneMask) == 0) in addMBBLiveIns()
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| /external/llvm/include/llvm/CodeGen/ |
| D | LiveInterval.h | 598 unsigned LaneMask; variable
601 SubRange(unsigned LaneMask) in SubRange() argument
602 : Next(nullptr), LaneMask(LaneMask) { in SubRange()
606 SubRange(unsigned LaneMask, const LiveRange &Other, in SubRange() argument
608 : LiveRange(Other, Allocator), Next(nullptr), LaneMask(LaneMask) { in SubRange()
680 SubRange *createSubRange(BumpPtrAllocator &Allocator, unsigned LaneMask) { in createSubRange() argument
681 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
688 SubRange *createSubRangeFrom(BumpPtrAllocator &Allocator, unsigned LaneMask, in createSubRangeFrom() argument
690 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
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| D | LiveIntervalAnalysis.h | 443 unsigned Reg, unsigned LaneMask = ~0u);
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 48 const unsigned LaneMask; variable
204 return LaneMask; in getLaneMask()
527 unsigned composeSubRegIndexLaneMask(unsigned IdxA, unsigned LaneMask) const { in composeSubRegIndexLaneMask() argument
529 return LaneMask; in composeSubRegIndexLaneMask()
530 return composeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in composeSubRegIndexLaneMask()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 34 : TheDef(R), EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
45 EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
87 if (LaneMask) in computeLaneMask()
88 return LaneMask; in computeLaneMask()
91 LaneMask = ~0u; in computeLaneMask()
98 LaneMask = M; in computeLaneMask()
99 return LaneMask; in computeLaneMask()
659 LaneMask(0) { in CodeGenRegisterClass()
1174 Idx.LaneMask = 1u << Bit; in computeSubRegLaneMasks()
1189 Idx.LaneMask = 0; in computeSubRegLaneMasks()
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| D | CodeGenRegisters.h | 63 mutable unsigned LaneMask; variable
311 unsigned LaneMask; variable
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| D | RegisterInfoEmitter.cpp | 1170 OS << format(" 0x%08x, // ", Idx.LaneMask) << Idx.getName() << '\n'; in runTargetDesc()
1289 << format("0x%08x,\n ", RC.LaneMask) in runTargetDesc()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 4698 int *LaneMask = &Mask[i * ResMultiplier]; in ReconstructShuffle() local
4703 LaneMask[j] = ExtractBase + j; in ReconstructShuffle()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 9262 SmallVector<int, 8> LaneMask; in lowerVectorShuffleByMerging128BitLanes() local
9263 LaneMask.resize(NumLanes * 2, -1); in lowerVectorShuffleByMerging128BitLanes()
9266 LaneMask[2 * i + 0] = 2*Lanes[i] + 0; in lowerVectorShuffleByMerging128BitLanes()
9267 LaneMask[2 * i + 1] = 2*Lanes[i] + 1; in lowerVectorShuffleByMerging128BitLanes()
9272 SDValue LaneShuffle = DAG.getVectorShuffle(LaneVT, DL, V1, V2, LaneMask); in lowerVectorShuffleByMerging128BitLanes()
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