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Searched refs:MRMSrcMem (Results 1 – 20 of 20) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrExtension.td47 def MOVSX16rm8 : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src),
55 def MOVSX32rm8 : I<0xBE, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src),
63 def MOVSX32rm16: I<0xBF, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
73 def MOVZX16rm8 : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src),
81 def MOVZX32rm8 : I<0xB6, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src),
89 def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
103 def MOVZX32_NOREXrm8 : I<0xB6, MRMSrcMem,
113 def MOVSX32_NOREXrm8 : I<0xBE, MRMSrcMem,
127 def MOVSX64rm8 : RI<0xBE, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src),
135 def MOVSX64rm16: RI<0xBF, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
[all …]
DX86InstrVMX.td19 def INVEPT32 : I<0x80, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2),
22 def INVEPT64 : I<0x80, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
26 def INVVPID32 : I<0x81, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2),
29 def INVVPID64 : I<0x81, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
54 def VMWRITE64rm : I<0x79, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
58 def VMWRITE32rm : I<0x79, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
DX86InstrXOP.td18 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
47 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins memop:$src),
57 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
67 def rmY : IXOP<opc, MRMSrcMem, (outs VR256:$dst), (ins f256mem:$src),
91 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst),
97 def mr : IXOP<opc, MRMSrcMem, (outs VR128:$dst),
125 def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
148 def rm : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
181 def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
195 def mi_alt : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
[all …]
DX86InstrSystem.td197 def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
199 def MOV32sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i32mem:$src),
201 def MOV64sm : RI<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i64mem:$src),
211 def LAR16rm : I<0x02, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
219 def LAR32rm : I<0x02, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
226 def LAR64rm : RI<0x02, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
231 def LSL16rm : I<0x03, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
237 def LSL32rm : I<0x03, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
243 def LSL64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
347 def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
[all …]
DX86InstrFMA.td33 def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst),
49 def mY : FMA3<opc, MRMSrcMem, (outs VR256:$dst),
143 def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
229 def rm : FMA4<opc, MRMSrcMem, (outs RC:$dst),
235 def mr : FMA4<opc, MRMSrcMem, (outs RC:$dst),
260 def rm_Int : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
266 def mr_Int : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
286 def rm : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
292 def mr : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
306 def rmY : FMA4<opc, MRMSrcMem, (outs VR256:$dst),
[all …]
DX86Instr3DNow.td38 def rm : I3DNow_binop<opc, MRMSrcMem, (ins VR64:$src1, i64mem:$src2), Mn, []>;
45 def rm : I3DNow_binop<opc, MRMSrcMem, (ins VR64:$src1, i64mem:$src2), Mn,
53 def rm : I3DNow_conv<opc, MRMSrcMem, (ins i64mem:$src1), Mn, []>;
60 def rm : I3DNow_conv<opc, MRMSrcMem, (ins i64mem:$src), Mn,
DX86InstrMMX.td105 def irm : MMXI<opc, MRMSrcMem, (outs VR64:$dst),
121 def rm : MMXI<opc, MRMSrcMem, (outs VR64:$dst),
143 def rm64 : MMXSS38I<opc, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src),
160 def rm64 : MMXSS38I<opc, MRMSrcMem, (outs VR64:$dst),
177 def R64irm : MMXSS3AI<0x0F, MRMSrcMem, (outs VR64:$dst),
191 def irm : MMXPI<opc, MRMSrcMem, (outs DstRC:$dst), (ins x86memop:$src), asm,
203 def irm : MMXPI<opc, MRMSrcMem, (outs DstRC:$dst),
226 def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src),
258 def MMX_MOVD64to64rm : MMXRI<0x6E, MRMSrcMem, (outs VR64:$dst),
290 def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src),
[all …]
DX86InstrAVX512.td426 def rm : AVX512AIi8<Opcode, MRMSrcMem, (outs VR512:$dst),
493 def VINSERTPSzrm: AVX512AIi8<0x21, MRMSrcMem, (outs VR128X:$dst),
640 defm m : AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),
792 def rm : AVX5128I<opc, MRMSrcMem, (outs DstRC:$dst), (ins x86memop:$src),
796 def krm : AVX5128I<opc, MRMSrcMem, (outs DstRC:$dst), (ins KRC:$mask,
816 def rm : AVX5128I<opc, MRMSrcMem, (outs VR512:$dst), (ins x86memop:$src),
819 def krm : AVX5128I<opc, MRMSrcMem, (outs VR512:$dst), (ins KRC:$mask,
910 def mi : AVX512AIi8<opc, MRMSrcMem, (outs _.RC:$dst),
933 def rm : AVX5128I<OpcVar, MRMSrcMem, (outs _.RC:$dst),
970 def rm : AVX5128I<opc, MRMSrcMem, (outs RC:$dst),
[all …]
DX86InstrSSE.td254 def rm : SI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
277 def rm_Int : SI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, memopr:$src2),
301 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
322 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
595 def V#NAME#rm : SI<0x10, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src),
599 def NAME#rm : SI<0x10, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src),
817 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src),
1130 def FsVMOVAPSrm : VPSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src),
1134 def FsVMOVAPDrm : VPDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src),
1138 def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src),
[all …]
DX86InstrCMovSetCC.td43 : I<opc, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2),
49 : I<opc, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
55 :RI<opc, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
DX86InstrArithmetic.td19 def LEA16r : I<0x8D, MRMSrcMem,
23 def LEA32r : I<0x8D, MRMSrcMem,
29 def LEA64_32r : I<0x8D, MRMSrcMem,
36 def LEA64r : RI<0x8D, MRMSrcMem, (outs GR64:$dst), (ins lea64mem:$src),
177 def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
184 def IMUL32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst),
191 def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
247 def IMUL16rmi : Ii16<0x69, MRMSrcMem, // GR16 = [mem16]*I16
254 def IMUL16rmi8 : Ii8<0x6B, MRMSrcMem, // GR16 = [mem16]*I8
261 def IMUL32rmi : Ii32<0x69, MRMSrcMem, // GR32 = [mem32]*I32
[all …]
DX86InstrInfo.td1121 def BSF16rm : I<0xBC, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
1129 def BSF32rm : I<0xBC, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
1137 def BSF64rm : RI<0xBC, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
1146 def BSR16rm : I<0xBD, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
1154 def BSR32rm : I<0xBD, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
1162 def BSR64rm : RI<0xBD, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
1397 def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src),
1400 def MOV16rm : I<0x8B, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
1403 def MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
1406 def MOV64rm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
[all …]
DX86InstrCompiler.td715 def NAME#8 : I<opc8, MRMSrcMem, (outs GR8:$dst),
721 def NAME#16 : I<opc, MRMSrcMem, (outs GR16:$dst),
728 def NAME#32 : I<opc, MRMSrcMem, (outs GR32:$dst),
735 def NAME#64 : RI<opc, MRMSrcMem, (outs GR64:$dst),
DX86InstrShiftRotate.td867 def mi : Ii8<0xF0, MRMSrcMem, (outs RC:$dst),
880 def rm : I<0xF7, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src1, RC:$src2),
DX86InstrFormats.td24 def MRMSrcMem : Format<6>; def RawFrmMemOffs : Format<7>;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h256 MRMSrcMem = 6, enumerator
681 case X86II::MRMSrcMem: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp755 case X86II::MRMSrcMem: in EmitVEXOpcodePrefix()
1026 case X86II::MRMSrcMem: { in DetermineREXPrefix()
1367 case X86II::MRMSrcMem: { in EncodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp100 MRMSrcMem = 6, enumerator
683 case X86Local::MRMSrcMem: in emitInstructionSpecifier()
849 case X86Local::MRMSrcReg: case X86Local::MRMSrcMem: in emitDecodePath()
/external/llvm/test/TableGen/
DTargetInstrInfo.td51 def MRMSrcMem : Format<6>;
/external/llvm/docs/
DWritingAnLLVMBackend.rst1817 case X86II::MRMSrcMem: // for instructions that use the Mod/RM byte