Home
last modified time | relevance | path

Searched refs:Op0 (Results 1 – 25 of 76) sorted by relevance

1234

/external/llvm/lib/Analysis/
DInstructionSimplify.cpp147 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)) in ExpandBinOp() local
148 if (Op0->getOpcode() == OpcodeToExpand) { in ExpandBinOp()
150 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; in ExpandBinOp()
206 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in SimplifyAssociativeBinOp() local
210 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
211 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
212 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
252 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
253 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
254 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
[all …]
/external/llvm/lib/Transforms/InstCombine/
DInstCombineMulDivRem.cpp170 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
175 if (Value *V = SimplifyMulInst(Op0, Op1, DL, TLI, DT, AC)) in visitMul()
183 BinaryOperator *BO = BinaryOperator::CreateNeg(Op0, I.getName()); in visitMul()
241 if (Op0->hasOneUse()) { in visitMul()
244 if (match(Op0, m_Sub(m_Value(Y), m_Value(X)))) in visitMul()
246 else if (match(Op0, m_Add(m_Value(Y), m_ConstantInt(C1)))) in visitMul()
260 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in visitMul()
264 if (isa<PHINode>(Op0)) in visitMul()
272 if (match(Op0, m_OneUse(m_Add(m_Value(X), m_Constant(C1))))) { in visitMul()
282 if (Value *Op0v = dyn_castNegVal(Op0)) { // -X * -Y = X*Y in visitMul()
[all …]
DInstCombineAndOrXor.cpp892 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); in FoldAndOfICmps() local
895 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder); in FoldAndOfICmps()
1207 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAnd() local
1212 if (Value *V = SimplifyAndInst(Op0, Op1, DL, TLI, DT, AC)) in visitAnd()
1231 if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) { in visitAnd()
1310 if (match(Op0, m_Trunc(m_And(m_Value(X), m_ConstantInt(YC))))) { in visitAnd()
1323 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in visitAnd()
1326 if (isa<PHINode>(Op0)) in visitAnd()
1333 if (Value *Op0NotVal = dyn_castNotVal(Op0)) in visitAnd()
1335 if (Op0->hasOneUse() && Op1->hasOneUse()) { in visitAnd()
[all …]
DInstCombineShifts.cpp26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
33 if (isa<Constant>(Op0)) in commonShiftTransforms()
39 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) in commonShiftTransforms()
321 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1, in FoldShiftByConstant() argument
339 CanEvaluateShifted(Op0, COp1->getZExtValue(), isLeftShift, *this, &I)) { in FoldShiftByConstant()
341 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n"); in FoldShiftByConstant()
344 I, GetShiftedValue(Op0, COp1->getZExtValue(), isLeftShift, *this, DL)); in FoldShiftByConstant()
349 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits(); in FoldShiftByConstant()
355 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0)) in FoldShiftByConstant()
362 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in FoldShiftByConstant()
[all …]
DInstCombineCompares.cpp2499 static bool swapMayExposeCSEOpportunities(const Value * Op0, in swapMayExposeCSEOpportunities() argument
2503 if (Op0->getType()->isPointerTy()) in swapMayExposeCSEOpportunities()
2513 for (const User *U : Op0->users()) { in swapMayExposeCSEOpportunities()
2521 if (BinOp->getOperand(Op1Idx) == Op0) { in swapMayExposeCSEOpportunities()
2650 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitICmpInst() local
2651 unsigned Op0Cplxity = getComplexity(Op0); in visitICmpInst()
2659 swapMayExposeCSEOpportunities(Op0, Op1))) { in visitICmpInst()
2661 std::swap(Op0, Op1); in visitICmpInst()
2665 if (Value *V = SimplifyICmpInst(I.getPredicate(), Op0, Op1, DL, TLI, DT, AC)) in visitICmpInst()
2673 if (match(Op0, m_Select(m_Value(Cond), m_Value(SelectTrue), in visitICmpInst()
[all …]
DInstCombineAddSub.cpp1506 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitSub() local
1511 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(), in visitSub()
1521 BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V); in visitSub()
1537 return BinaryOperator::CreateXor(Op0, Op1); in visitSub()
1540 if (match(Op0, m_AllOnes())) in visitSub()
1543 if (Constant *C = dyn_cast<Constant>(Op0)) { in visitSub()
1573 if (ConstantInt *C = dyn_cast<ConstantInt>(Op0)) { in visitSub()
1595 if (match(Op1, m_Add(m_Specific(Op0), m_Value(Y))) || in visitSub()
1596 match(Op1, m_Add(m_Value(Y), m_Specific(Op0)))) in visitSub()
1600 if (match(Op0, m_Sub(m_Specific(Op1), m_Value(Y)))) in visitSub()
[all …]
DInstructionCombining.cpp192 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(I.getOperand(0)); in SimplifyAssociativeOrCommutative() local
197 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
198 Value *A = Op0->getOperand(0); in SimplifyAssociativeOrCommutative()
199 Value *B = Op0->getOperand(1); in SimplifyAssociativeOrCommutative()
210 (!Op0 || (isa<BinaryOperator>(Op0) && Op0->hasNoSignedWrap()))) { in SimplifyAssociativeOrCommutative()
248 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
249 Value *A = Op0->getOperand(0); in SimplifyAssociativeOrCommutative()
250 Value *B = Op0->getOperand(1); in SimplifyAssociativeOrCommutative()
289 if (Op0 && Op1 && in SimplifyAssociativeOrCommutative()
290 Op0->getOpcode() == Opcode && Op1->getOpcode() == Opcode && in SimplifyAssociativeOrCommutative()
[all …]
/external/llvm/include/llvm/CodeGen/
DFastISel.h336 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
341 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
347 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
353 virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
360 unsigned Op0, bool Op0IsKill, unsigned Op1,
368 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
389 const TargetRegisterClass *RC, unsigned Op0,
395 const TargetRegisterClass *RC, unsigned Op0,
401 const TargetRegisterClass *RC, unsigned Op0,
408 const TargetRegisterClass *RC, unsigned Op0,
[all …]
/external/llvm/lib/Transforms/Scalar/
DScalarizer.cpp74 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
76 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name); in operator ()()
85 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
87 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name); in operator ()()
96 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
98 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name); in operator ()()
375 Scatterer Op0 = scatter(&I, I.getOperand(0)); in splitBinary() local
377 assert(Op0.size() == NumElems && "Mismatched binary operation"); in splitBinary()
382 Res[Elem] = Split(Builder, Op0[Elem], Op1[Elem], in splitBinary()
403 Scatterer Op0 = scatter(&SI, SI.getOperand(0)); in visitSelectInst() local
[all …]
DCorrelatedValuePropagation.cpp167 Value *Op0 = C->getOperand(0); in processCmp() local
168 if (isa<Instruction>(Op0) && in processCmp()
169 cast<Instruction>(Op0)->getParent() == C->getParent()) in processCmp()
/external/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp421 unsigned Op0 = getRegForValue(I->getOperand(0)); in selectBinaryOp() local
422 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBinaryOp()
444 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
457 ISDOpcode, Op0, Op0IsKill, CF); in selectBinaryOp()
472 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
1279 unsigned Op0 = getRegForValue(I->getOperand(0)); in selectBitCast() local
1280 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBitCast()
1293 TII.get(TargetOpcode::COPY), ResultReg).addReg(Op0); in selectBitCast()
1299 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1445 const Value *Op0 = EVI->getOperand(0); in selectExtractValue() local
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp292 SDNode *splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
401 SDValue Op0, uint64_t Op1) { in expandDisp() argument
405 changeComponent(AM, IsBase, Op0); in expandDisp()
424 SDValue Op0 = N.getOperand(0); in expandAddress() local
427 unsigned Op0Code = Op0->getOpcode(); in expandAddress()
433 return expandAdjDynAlloc(AM, IsBase, Op0); in expandAddress()
437 cast<ConstantSDNode>(Op0)->getSExtValue()); in expandAddress()
439 return expandDisp(AM, IsBase, Op0, in expandAddress()
442 if (IsBase && expandIndex(AM, Op0, Op1)) in expandAddress()
941 SDValue Op0 = N->getOperand(I ^ 1); in tryRxSBG() local
[all …]
DSystemZISelLowering.cpp45 : Op0(Op0In), Op1(Op1In), Opcode(0), ICmpType(0), CCValid(0), CCMask(0) {} in Comparison()
48 SDValue Op0, Op1; member
1205 if (!C.Op0.hasOneUse() || in adjustSubwordCmp()
1206 C.Op0.getOpcode() != ISD::LOAD || in adjustSubwordCmp()
1211 auto *Load = cast<LoadSDNode>(C.Op0); in adjustSubwordCmp()
1256 if (C.Op0.getValueType() != MVT::i32 || in adjustSubwordCmp()
1258 C.Op0 = DAG.getExtLoad(ExtType, SDLoc(Load), MVT::i32, in adjustSubwordCmp()
1296 if (C.Op0.getValueType() == MVT::f128) in shouldSwapCmpOperands()
1318 if (isNaturalMemoryOperand(C.Op0, C.ICmpType) && C.Op0.hasOneUse()) { in shouldSwapCmpOperands()
1337 unsigned Opcode0 = C.Op0.getOpcode(); in shouldSwapCmpOperands()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonExpandPredSpillCode.cpp100 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
111 NewMI->addOperand(Op0); in runOnMachineFunction()
143 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
155 NewMI->addOperand(Op0); in runOnMachineFunction()
185 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
196 NewMI->addOperand(Op0); in runOnMachineFunction()
222 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
232 NewMI->addOperand(Op0); in runOnMachineFunction()
/external/llvm/lib/Target/X86/
DX86FloatingPoint.cpp1150 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); in handleTwoArgFP() local
1152 bool KillsOp0 = MI->killsRegister(X86::FP0+Op0); in handleTwoArgFP()
1160 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? in handleTwoArgFP()
1165 moveToTop(Op0, I); // Move dead operand to TOS. in handleTwoArgFP()
1166 TOS = Op0; in handleTwoArgFP()
1176 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1177 Op0 = TOS = Dest; in handleTwoArgFP()
1184 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1185 Op0 = TOS = Dest; in handleTwoArgFP()
1191 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) && in handleTwoArgFP()
[all …]
/external/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp200 SDValue Op0, Op1; in SelectInlineAsmMemoryOperand() local
205 if (!SelectADDRrr(Op, Op0, Op1)) in SelectInlineAsmMemoryOperand()
206 SelectADDRri(Op, Op0, Op1); in SelectInlineAsmMemoryOperand()
210 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
/external/llvm/lib/ExecutionEngine/
DExecutionEngine.cpp624 Constant *Op0 = CE->getOperand(0); in getConstantValue() local
628 GenericValue Result = getConstantValue(Op0); in getConstantValue()
637 GenericValue GV = getConstantValue(Op0); in getConstantValue()
643 GenericValue GV = getConstantValue(Op0); in getConstantValue()
649 GenericValue GV = getConstantValue(Op0); in getConstantValue()
656 GenericValue GV = getConstantValue(Op0); in getConstantValue()
662 GenericValue GV = getConstantValue(Op0); in getConstantValue()
667 GenericValue GV = getConstantValue(Op0); in getConstantValue()
682 GenericValue GV = getConstantValue(Op0); in getConstantValue()
698 GenericValue GV = getConstantValue(Op0); in getConstantValue()
[all …]
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp110 unsigned Op0, bool Op0IsKill);
113 unsigned Op0, bool Op0IsKill,
117 unsigned Op0, bool Op0IsKill,
122 unsigned Op0, bool Op0IsKill,
126 unsigned Op0, bool Op0IsKill,
288 unsigned Op0, bool Op0IsKill) { in fastEmitInst_r() argument
294 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_r()
297 ResultReg).addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
300 .addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
310 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
[all …]
DARMLoadStoreOptimizer.cpp1864 bool CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl,
1943 static void concatenateMemOperands(MachineInstr *MI, MachineInstr *Op0, in concatenateMemOperands() argument
1946 size_t numMemRefs = (Op0->memoperands_end() - Op0->memoperands_begin()) in concatenateMemOperands()
1952 std::copy(Op0->memoperands_begin(), Op0->memoperands_end(), MemBegin); in concatenateMemOperands()
1959 ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, in CanFormLdStDWord() argument
1972 unsigned Opcode = Op0->getOpcode(); in CanFormLdStDWord()
1992 if (!Op0->hasOneMemOperand() || in CanFormLdStDWord()
1993 (*Op0->memoperands_begin())->isVolatile()) in CanFormLdStDWord()
1996 unsigned Align = (*Op0->memoperands_begin())->getAlignment(); in CanFormLdStDWord()
2005 int OffImm = getMemoryOpOffset(Op0); in CanFormLdStDWord()
[all …]
/external/llvm/lib/IR/
DAutoUpgrade.cpp594 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
606 Rep = Builder.CreateShuffleVector(Op0, Op1, ConstantVector::get(Idxs)); in UpgradeIntrinsicCall()
611 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
652 Rep = Builder.CreateShuffleVector(Op0, Rep, ConstantVector::get(Idxs2)); in UpgradeIntrinsicCall()
657 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
672 Value *UndefV = UndefValue::get(Op0->getType()); in UpgradeIntrinsicCall()
673 Rep = Builder.CreateShuffleVector(Op0, UndefV, ConstantVector::get(Idxs)); in UpgradeIntrinsicCall()
686 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
707 Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs)); in UpgradeIntrinsicCall()
/external/llvm/include/llvm/IR/
DGetElementPtrTypeIterator.h102 gep_type_begin(Type *Op0, ArrayRef<T> A) { in gep_type_begin() argument
103 return generic_gep_type_iterator<const T *>::begin(Op0, A.begin()); in gep_type_begin()
DPatternMatch.h1234 inline typename m_Intrinsic_Ty<T0>::Ty m_Intrinsic(const T0 &Op0) {
1235 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
1239 inline typename m_Intrinsic_Ty<T0, T1>::Ty m_Intrinsic(const T0 &Op0,
1241 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
1246 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) {
1247 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
1253 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) {
1254 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1, Op2), m_Argument<3>(Op3));
1259 inline typename m_Intrinsic_Ty<Opnd0>::Ty m_BSwap(const Opnd0 &Op0) {
1260 return m_Intrinsic<Intrinsic::bswap>(Op0);
[all …]
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp554 SDValue Op0 = N->getOperand(0); in performANDCombine() local
556 unsigned Op0Opcode = Op0->getOpcode(); in performANDCombine()
574 SDValue Op0Op2 = Op0->getOperand(2); in performANDCombine()
581 SDValue Ops[] = { Op0->getOperand(0), Op0->getOperand(1), Op0Op2 }; in performANDCombine()
582 return DAG.getNode(MipsISD::VEXTRACT_ZEXT_ELT, SDLoc(Op0), in performANDCombine()
583 Op0->getVTList(), in performANDCombine()
584 makeArrayRef(Ops, Op0->getNumOperands())); in performANDCombine()
674 SDValue Op0 = N->getOperand(0); in performORCombine() local
677 if (Op0->getOpcode() == ISD::AND && Op1->getOpcode() == ISD::AND) { in performORCombine()
678 SDValue Op0Op0 = Op0->getOperand(0); in performORCombine()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp193 unsigned emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, int64_t Imm);
211 unsigned emitMul_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
213 unsigned emitSMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
215 unsigned emitUMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
1467 unsigned AArch64FastISel::emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, in emitAdd_ri_() argument
1471 ResultReg = emitAddSub_ri(false, VT, Op0, Op0IsKill, -Imm); in emitAdd_ri_()
1473 ResultReg = emitAddSub_ri(true, VT, Op0, Op0IsKill, Imm); in emitAdd_ri_()
1482 ResultReg = emitAddSub_rr(true, VT, Op0, Op0IsKill, CReg, true); in emitAdd_ri_()
2027 const Value *Op0 = I->getOperand(0); in selectStore() local
2031 if (!isTypeSupported(Op0->getType(), VT, /*IsVectorAllowed=*/true) || in selectStore()
[all …]
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.cpp837 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in fromString() local
839 Ops[1].getAsInteger(10, Op0); in fromString()
844 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in fromString()
868 uint32_t Op0 = (Bits >> 14) & 0x3; in toString() local
874 return "s" + utostr(Op0)+ "_" + utostr(Op1) + "_c" + utostr(CRn) in toString()

1234