| /external/libopus/silk/float/ |
| D | corrMatrix_FLP.c | 43 …const opus_int Order, /* I Max lag for correlatio… in silk_corrVector_FLP() argument
50 … ptr1 = &x[ Order - 1 ]; /* Points to first sample of column 0 of X: X[:,0] */ in silk_corrVector_FLP()
51 for( lag = 0; lag < Order; lag++ ) { in silk_corrVector_FLP()
62 …const opus_int Order, /* I Max lag for correlatio… in silk_corrMatrix_FLP() argument
70 ptr1 = &x[ Order - 1 ]; /* First sample of column 0 of X */ in silk_corrMatrix_FLP()
72 matrix_ptr( XX, 0, 0, Order ) = ( silk_float )energy; in silk_corrMatrix_FLP()
73 for( j = 1; j < Order; j++ ) { in silk_corrMatrix_FLP()
76 matrix_ptr( XX, j, j, Order ) = ( silk_float )energy; in silk_corrMatrix_FLP()
79 ptr2 = &x[ Order - 2 ]; /* First sample of column 1 of X */ in silk_corrMatrix_FLP()
80 for( lag = 1; lag < Order; lag++ ) { in silk_corrMatrix_FLP()
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| /external/deqp/framework/referencerenderer/ |
| D | rrVertexAttrib.cpp | 59 template<typename SrcScalarType, typename DstScalarType, typename Order>
65 dst[Order::T0] = DstScalarType(aligned[0]); in readOrder()
66 if (size >= 2) dst[Order::T1] = DstScalarType(aligned[1]); in readOrder()
67 if (size >= 3) dst[Order::T2] = DstScalarType(aligned[2]); in readOrder()
68 if (size >= 4) dst[Order::T3] = DstScalarType(aligned[3]); in readOrder()
71 template<typename SrcScalarType, typename Order>
79 dst[Order::T0] = float(aligned[0]) / float(range); in readUnormOrder()
80 if (size >= 2) dst[Order::T1] = float(aligned[1]) / float(range); in readUnormOrder()
81 if (size >= 3) dst[Order::T2] = float(aligned[2]) / float(range); in readUnormOrder()
82 if (size >= 4) dst[Order::T3] = float(aligned[3]) / float(range); in readUnormOrder()
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| /external/cblas/include/ |
| D | cblas.h | 416 void cblas_sgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
421 void cblas_ssymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
426 void cblas_ssyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
430 void cblas_ssyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
435 void cblas_strmm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
440 void cblas_strsm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
446 void cblas_dgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
451 void cblas_dsymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
456 void cblas_dsyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
460 void cblas_dsyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
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| /external/llvm/lib/CodeGen/ |
| D | AllocationOrder.cpp | 36 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); in AllocationOrder()
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM); in AllocationOrder()
50 assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() && in AllocationOrder()
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| D | AllocationOrder.h | 30 ArrayRef<MCPhysReg> Order; variable
43 ArrayRef<MCPhysReg> getOrder() const { return Order; } in getOrder()
52 Limit = Order.size();
54 unsigned Reg = Order[Pos++];
69 return Order[Pos++]; in nextWithDups()
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| D | RegAllocGreedy.cpp | 359 AllocationOrder &Order,
368 unsigned tryAssignCSRFirstTime(LiveInterval &VirtReg, AllocationOrder &Order,
594 AllocationOrder &Order, in tryAssign() argument
596 Order.rewind(); in tryAssign()
598 while ((PhysReg = Order.next())) in tryAssign()
601 if (!PhysReg || Order.isHint()) in tryAssign()
609 if (Order.isHint(Hint)) { in tryAssign()
628 unsigned CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost); in tryAssign()
638 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo); in canReassign() local
640 while ((PhysReg = Order.next())) { in canReassign()
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 448 void setIROrder(unsigned Order) { IROrder = Order; }
712 SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
718 NumValues(VTs.NumVTs), debugLoc(std::move(dl)), IROrder(Order) {
734 SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
738 debugLoc(std::move(dl)), IROrder(Order) {
835 SDLoc(const Instruction *I, int Order) : Ptr(I), IROrder(Order) {
836 assert(Order >= 0 && "bad IROrder");
934 UnarySDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
936 : SDNode(Opc, Order, dl, VTs) {
946 BinarySDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SDNodeDbgValue.h | 52 unsigned Order; variable
58 : Var(Var), Expr(Expr), IsIndirect(indir), Offset(off), DL(dl), Order(O), in SDDbgValue()
68 : Var(Var), Expr(Expr), IsIndirect(false), Offset(off), DL(dl), Order(O), in SDDbgValue()
77 : Var(Var), Expr(Expr), IsIndirect(false), Offset(off), DL(dl), Order(O), in SDDbgValue()
115 unsigned getOrder() const { return Order; } in getOrder()
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| /external/aac/libAACdec/src/ |
| D | aacdec_tns.cpp | 176 filter->Order = order = (UCHAR) FDKreadBits(bs, isLongFlag ? 5 : 3); in CTns_Read()
179 if (filter->Order > TNS_MAXIMUM_ORDER){ in CTns_Read()
180 filter->Order = order = TNS_MAXIMUM_ORDER; in CTns_Read()
356 if (filter->Order > 0) in CTns_Apply()
361 pCoeff = &coeff[filter->Order-1]; in CTns_Apply()
365 for (i=0; i < filter->Order; i++) in CTns_Apply()
371 for (i=0; i < filter->Order; i++) in CTns_Apply()
404 filter->Order ); in CTns_Apply()
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| /external/cblas/src/ |
| D | cblas_csyrk.c | 12 void cblas_csyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_csyrk() argument
40 if( Order == CblasColMajor ) in cblas_csyrk()
72 } else if (Order == CblasRowMajor) in cblas_csyrk()
103 else cblas_xerbla(1, "cblas_csyrk", "Illegal Order setting, %d\n", Order); in cblas_csyrk()
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| D | cblas_zhemm.c | 12 void cblas_zhemm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side, in cblas_zhemm() argument
42 if( Order == CblasColMajor ) in cblas_zhemm()
71 } else if (Order == CblasRowMajor) in cblas_zhemm()
102 else cblas_xerbla(1, "cblas_zhemm", "Illegal Order setting, %d\n", Order); in cblas_zhemm()
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| D | cblas_cherk.c | 12 void cblas_cherk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_cherk() argument
40 if( Order == CblasColMajor ) in cblas_cherk()
70 } else if (Order == CblasRowMajor) in cblas_cherk()
101 else cblas_xerbla(1, "cblas_cherk", "Illegal Order setting, %d\n", Order); in cblas_cherk()
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| D | cblas_ssymm.c | 12 void cblas_ssymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side, in cblas_ssymm() argument
42 if( Order == CblasColMajor ) in cblas_ssymm()
72 } else if (Order == CblasRowMajor) in cblas_ssymm()
104 "Illegal Order setting, %d\n", Order); in cblas_ssymm()
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| D | cblas_zsyrk.c | 12 void cblas_zsyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_zsyrk() argument
40 if( Order == CblasColMajor ) in cblas_zsyrk()
72 } else if (Order == CblasRowMajor) in cblas_zsyrk()
103 else cblas_xerbla(1, "cblas_zsyrk", "Illegal Order setting, %d\n", Order); in cblas_zsyrk()
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| D | cblas_zsymm.c | 12 void cblas_zsymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side, in cblas_zsymm() argument
42 if( Order == CblasColMajor ) in cblas_zsymm()
71 } else if (Order == CblasRowMajor) in cblas_zsymm()
102 else cblas_xerbla(1, "cblas_zsymm", "Illegal Order setting, %d\n", Order); in cblas_zsymm()
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| D | cblas_dsyrk.c | 12 void cblas_dsyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_dsyrk() argument
40 if( Order == CblasColMajor ) in cblas_dsyrk()
72 } else if (Order == CblasRowMajor) in cblas_dsyrk()
103 else cblas_xerbla(1, "cblas_dsyrk","Illegal Order setting, %d\n", Order); in cblas_dsyrk()
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| D | cblas_chemm.c | 12 void cblas_chemm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side, in cblas_chemm() argument
42 if( Order == CblasColMajor ) in cblas_chemm()
71 } else if (Order == CblasRowMajor) in cblas_chemm()
102 else cblas_xerbla(1, "cblas_chemm", "Illegal Order setting, %d\n", Order); in cblas_chemm()
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| D | cblas_csymm.c | 12 void cblas_csymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side, in cblas_csymm() argument
42 if( Order == CblasColMajor ) in cblas_csymm()
71 } else if (Order == CblasRowMajor) in cblas_csymm()
102 else cblas_xerbla(1, "cblas_csymm", "Illegal Order setting, %d\n", Order); in cblas_csymm()
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| D | cblas_dsymm.c | 12 void cblas_dsymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side, in cblas_dsymm() argument
42 if( Order == CblasColMajor ) in cblas_dsymm()
71 } else if (Order == CblasRowMajor) in cblas_dsymm()
102 else cblas_xerbla(1, "cblas_dsymm","Illegal Order setting, %d\n", Order); in cblas_dsymm()
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| D | cblas_ssyrk.c | 12 void cblas_ssyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_ssyrk() argument
40 if( Order == CblasColMajor ) in cblas_ssyrk()
73 } else if (Order == CblasRowMajor) in cblas_ssyrk()
105 "Illegal Order setting, %d\n", Order); in cblas_ssyrk()
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| D | cblas_zherk.c | 12 void cblas_zherk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_zherk() argument
40 if( Order == CblasColMajor ) in cblas_zherk()
70 } else if (Order == CblasRowMajor) in cblas_zherk()
101 else cblas_xerbla(1, "cblas_zherk", "Illegal Order setting, %d\n", Order); in cblas_zherk()
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| D | cblas_csyr2k.c | 12 void cblas_csyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_csyr2k() argument
42 if( Order == CblasColMajor ) in cblas_csyr2k()
74 } else if (Order == CblasRowMajor) in cblas_csyr2k()
104 else cblas_xerbla(1, "cblas_csyr2k", "Illegal Order setting, %d\n", Order); in cblas_csyr2k()
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| D | cblas_ssyr2k.c | 12 void cblas_ssyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_ssyr2k() argument
42 if( Order == CblasColMajor ) in cblas_ssyr2k()
75 } else if (Order == CblasRowMajor) in cblas_ssyr2k()
107 "Illegal Order setting, %d\n", Order); in cblas_ssyr2k()
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| D | cblas_dsyr2k.c | 12 void cblas_dsyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_dsyr2k() argument
42 if( Order == CblasColMajor ) in cblas_dsyr2k()
74 } else if (Order == CblasRowMajor) in cblas_dsyr2k()
105 else cblas_xerbla(1, "cblas_dsyr2k","Illegal Order setting, %d\n", Order); in cblas_dsyr2k()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | StructurizeCFG.cpp | 175 RNVector Order; member in __anon4219a3590111::StructurizeCFG
314 if (std::find(Order.begin(), Order.end(), *I) != Order.end()) in orderNodes()
327 Order.push_back(*LoopI); in orderNodes()
338 Order.push_back(*I); in orderNodes()
345 std::reverse(Order.begin(), Order.end()); in orderNodes()
498 for (RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend(); in collectInfos()
701 BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() : in getNextFlow()
702 Order.back()->getEntry(); in getNextFlow()
733 if (Order.empty() && ExitUseAllowed) { in needPostfix()
786 RegionNode *Node = Order.pop_back_val(); in wireFlow()
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