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Searched refs:PIPE_SHADER_CAP_MAX_ADDRS (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_limits.h93 case PIPE_SHADER_CAP_MAX_ADDRS: in gallivm_get_shader_param()
/external/mesa3d/src/gallium/drivers/r300/
Dr300_screen.c220 case PIPE_SHADER_CAP_MAX_ADDRS: in r300_get_shader_param()
261 case PIPE_SHADER_CAP_MAX_ADDRS: in r300_get_shader_param()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_screen.c295 case PIPE_SHADER_CAP_MAX_ADDRS: in svga_get_shader_param()
347 case PIPE_SHADER_CAP_MAX_ADDRS: in svga_get_shader_param()
/external/mesa3d/src/gallium/drivers/nv30/
Dnv30_screen.c182 case PIPE_SHADER_CAP_MAX_ADDRS: in nv30_screen_get_shader_param()
215 case PIPE_SHADER_CAP_MAX_ADDRS: in nv30_screen_get_shader_param()
/external/mesa3d/src/gallium/include/pipe/
Dp_defines.h523 PIPE_SHADER_CAP_MAX_ADDRS = 9, enumerator
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_exec.h414 case PIPE_SHADER_CAP_MAX_ADDRS: in tgsi_exec_get_shader_param()
/external/mesa3d/src/gallium/drivers/i915/
Di915_screen.c137 case PIPE_SHADER_CAP_MAX_ADDRS: in i915_get_shader_param()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dradeonsi_pipe.c449 case PIPE_SHADER_CAP_MAX_ADDRS: in r600_get_shader_param()
/external/mesa3d/src/mesa/state_tracker/
Dst_extensions.c190 … pc->MaxNativeAddressRegs = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_ADDRS); in st_init_limits()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_pipe.c543 case PIPE_SHADER_CAP_MAX_ADDRS: in r600_get_shader_param()
/external/mesa3d/src/gallium/drivers/nvc0/
Dnvc0_screen.c198 case PIPE_SHADER_CAP_MAX_ADDRS: in nvc0_screen_get_shader_param()
/external/mesa3d/src/gallium/drivers/nv50/
Dnv50_screen.c214 case PIPE_SHADER_CAP_MAX_ADDRS: in nv50_screen_get_shader_param()
/external/mesa3d/src/gallium/docs/source/
Dscreen.rst189 * ``PIPE_SHADER_CAP_MAX_ADDRS``: The maximum number of address registers.