Searched refs:PredR (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 156 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond);
160 MachineBasicBlock::iterator Where, unsigned PredR, bool Cond);
161 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR,
766 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond) { in getReachingDefForPred() argument
779 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(MI))) in getReachingDefForPred()
789 if (RR.Reg == PredR) { in getReachingDefForPred()
878 MachineBasicBlock::iterator Where, unsigned PredR, bool Cond) { in predicateAt() argument
906 MB.addReg(PredR); in predicateAt()
932 unsigned PredR, bool Cond, MachineBasicBlock::iterator First, in renameInRange() argument
941 if (!MI->readsRegister(PredR) || (Cond != HII->isPredicatedTrue(MI))) in renameInRange()
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| D | HexagonHardwareLoops.cpp | 375 unsigned PredR = Cond[CSz-1].getReg(); in findInductionRegister() local
377 MachineInstr *PredI = MRI->getVRegDef(PredR); in findInductionRegister()
1159 unsigned PredR = CmpI->getOperand(0).getReg(); in orderBumpCompare() local
1167 if (MO.getReg() == PredR) // Found an intervening use of PredR. in orderBumpCompare()
1467 unsigned PredR = PN->getOperand(i).getReg(); in createPreheaderForLoop() local
1472 NewPN->addOperand(MachineOperand::CreateReg(PredR, false)); in createPreheaderForLoop()
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