/external/clang/test/SemaTemplate/ |
D | nested-name-spec-template.cpp | 5 template<typename T> struct Promote; 7 template<> struct Promote<short> { struct 11 template<> struct Promote<int> { struct 15 template<> struct Promote<float> { struct 19 Promote<short>::type *ret_intptr(int* ip) { return ip; } in ret_intptr() 20 Promote<int>::type *ret_intptr2(int* ip) { return ip; } in ret_intptr2() 23 M::Promote<int>::type *ret_intptr3(int* ip) { return ip; } in ret_intptr3() 24 …M::template Promote<int>::type *ret_intptr4(int* ip) { return ip; } // expected-warning{{'template… in ret_intptr4() 25 M::template Promote<int> pi; // expected-warning{{'template' keyword outside of a template}} 28 N::M::Promote<int>::type *ret_intptr5(int* ip) { return ip; } in ret_intptr5() argument [all …]
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/external/llvm/lib/Target/X86/ |
D | X86CallingConv.td | 120 // Promote all types to i32 167 // Promote all types to i64 176 // Promote all types to i64 244 // Promote i8/i16 arguments to i32. 306 // Promote i8/i16 arguments to i32. 372 // Promote i8/i16/i32 arguments to i64. 386 // Promote i8/i16/i32 arguments to i64. 398 // Promote i8/i16 arguments to i32. 484 // Promote i8/i16 arguments to i32. 499 // Promote i8/i16 arguments to i32. [all …]
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D | X86ISelLowering.cpp | 157 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in X86TargetLowering() 179 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); in X86TargetLowering() 180 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); in X86TargetLowering() 181 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); in X86TargetLowering() 184 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); in X86TargetLowering() 197 setOperationAction(ISD::SINT_TO_FP , MVT::i1 , Promote); in X86TargetLowering() 198 setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promote); in X86TargetLowering() 203 setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote); in X86TargetLowering() 211 setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote); in X86TargetLowering() 212 setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Promote); in X86TargetLowering() [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZCallingConv.td | 19 // Promote i32 to i64 if it has an explicit extension type. 45 // Promote i32 to i64 if it has an explicit extension type.
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/external/llvm/test/Transforms/LICM/ |
D | 2007-10-01-PromoteSafeValue.ll | 2 ; Promote value if at least one use is safe
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/external/llvm/lib/Target/BPF/ |
D | BPFCallingConv.td | 19 // Promote i8/i16/i32 args to i64
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D | BPFISelLowering.cpp | 153 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering() 154 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering() 155 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430CallingConv.td | 30 // Promote i8 arguments to i16.
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D | MSP430ISelLowering.cpp | 85 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering() 86 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering() 87 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
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/external/llvm/lib/Target/XCore/ |
D | XCoreCallingConv.td | 28 // Promote i8/i16 arguments to i32.
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/external/llvm/test/CodeGen/ARM/ |
D | 2009-02-16-SpillerBug.ll | 98 …call fastcc void @Promote(%struct.rec* %hd, %struct.rec* %stop_link.3, %struct.rec* null, i32 1) n… 115 declare fastcc void @Promote(%struct.rec*, %struct.rec*, %struct.rec* nocapture, i32) nounwind
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/external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
D | toy.ml | 33 (* Promote allocas to registers. *)
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 285 setOperationAction(ISD::SETCC, MVT::f16, Promote); in AArch64TargetLowering() 286 setOperationAction(ISD::BR_CC, MVT::f16, Promote); in AArch64TargetLowering() 287 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); in AArch64TargetLowering() 288 setOperationAction(ISD::SELECT, MVT::f16, Promote); in AArch64TargetLowering() 289 setOperationAction(ISD::FADD, MVT::f16, Promote); in AArch64TargetLowering() 290 setOperationAction(ISD::FSUB, MVT::f16, Promote); in AArch64TargetLowering() 291 setOperationAction(ISD::FMUL, MVT::f16, Promote); in AArch64TargetLowering() 292 setOperationAction(ISD::FDIV, MVT::f16, Promote); in AArch64TargetLowering() 293 setOperationAction(ISD::FREM, MVT::f16, Promote); in AArch64TargetLowering() 294 setOperationAction(ISD::FMA, MVT::f16, Promote); in AArch64TargetLowering() [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1233 setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote); in promoteLdStType() 1237 setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote); in promoteLdStType() 1284 setOperationAction(ISD::STORE, MVT::v4i16, Promote); in HexagonTargetLowering() 1451 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering() 1452 setOperationAction(ISD::FP_TO_SINT, MVT::i1, Promote); in HexagonTargetLowering() 1453 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering() 1454 setOperationAction(ISD::SINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering() 1456 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering() 1457 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote); in HexagonTargetLowering() 1458 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering() [all …]
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 88 Promote, // This operation should be executed in a larger type. enumerator 556 getOperationAction(Op, VT) == Promote); in isOperationLegalOrPromote() 665 assert(Action != Promote && "Can't promote condition code!"); in getCondCodeAction() 680 assert(getOperationAction(Op, VT) == Promote && in getTypeToPromoteTo() 698 getOperationAction(Op, NVT) == Promote); in getTypeToPromoteTo()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 147 setOperationAction(ISD::STORE, MVT::f32, Promote); in AMDGPUTargetLowering() 150 setOperationAction(ISD::STORE, MVT::v2f32, Promote); in AMDGPUTargetLowering() 153 setOperationAction(ISD::STORE, MVT::v4f32, Promote); in AMDGPUTargetLowering() 156 setOperationAction(ISD::STORE, MVT::v8f32, Promote); in AMDGPUTargetLowering() 159 setOperationAction(ISD::STORE, MVT::v16f32, Promote); in AMDGPUTargetLowering() 162 setOperationAction(ISD::STORE, MVT::f64, Promote); in AMDGPUTargetLowering() 165 setOperationAction(ISD::STORE, MVT::v2f64, Promote); in AMDGPUTargetLowering() 187 setOperationAction(ISD::LOAD, MVT::f32, Promote); in AMDGPUTargetLowering() 190 setOperationAction(ISD::LOAD, MVT::v2f32, Promote); in AMDGPUTargetLowering() 193 setOperationAction(ISD::LOAD, MVT::v4f32, Promote); in AMDGPUTargetLowering() [all …]
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D | SIISelLowering.cpp | 94 setOperationAction(ISD::SELECT, MVT::f64, Promote); in SITargetLowering() 134 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in SITargetLowering() 139 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in SITargetLowering() 144 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in SITargetLowering() 174 setOperationAction(ISD::SELECT, MVT::i1, Promote); in SITargetLowering()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 113 SDValue Promote(SDValue Op); 336 case TargetLowering::Promote: in LegalizeOp() 337 Result = Promote(Op); in LegalizeOp() 366 SDValue VectorLegalizer::Promote(SDValue Op) { in Promote() function in __anon741ec2090111::VectorLegalizer
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/external/llvm/lib/Target/Mips/ |
D | MipsCallingConv.td | 78 // Promote i8/i16 arguments to i32. 216 // Promote i8/i16 arguments to i32. 298 // Promote i8/i16 arguments to i32.
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/external/lldb/include/lldb/Core/ |
D | Scalar.h | 101 Promote(Scalar::Type type);
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/external/llvm/test/Transforms/ScalarRepl/ |
D | phi-select.ll | 133 ;; Promote allocs that are PHI'd together by moving the loads.
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/external/llvm/lib/Target/Sparc/ |
D | SparcCallingConv.td | 101 // - Promote to integer or floating point registers depending on type.
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/external/llvm/docs/ |
D | ExtendingLLVM.rst | 117 to Promote your node's operands to a larger size, and perform the correct 143 does not natively support your node, then tell the target to either Promote
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/external/llvm/cmake/modules/ |
D | HandleLLVMOptions.cmake | 309 -w14062 # Promote 'enumerator in switch of enum is not handled' to level 1 warning. 312 -we4238 # Promote 'nonstandard extension used : class rvalue used as lvalue' to error.
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-promote-const.ll | 13 ; Promote constant has created a big constant for the whole structure
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