| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600InstrInfo.cpp | 27 R600InstrInfo::R600InstrInfo(AMDGPUTargetMachine &tm) in R600InstrInfo() function in R600InstrInfo
33 const R600RegisterInfo &R600InstrInfo::getRegisterInfo() const in getRegisterInfo()
38 bool R600InstrInfo::isTrig(const MachineInstr &MI) const in isTrig()
43 bool R600InstrInfo::isVector(const MachineInstr &MI) const in isVector()
49 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
78 MachineInstr * R600InstrInfo::getMovImmInstr(MachineFunction *MF, in getMovImmInstr()
90 unsigned R600InstrInfo::getIEQOpcode() const in getIEQOpcode()
95 bool R600InstrInfo::isMov(unsigned Opcode) const in isMov()
111 bool R600InstrInfo::isPlaceHolderOpcode(unsigned Opcode) const in isPlaceHolderOpcode()
122 bool R600InstrInfo::isReductionOp(unsigned Opcode) const in isReductionOp()
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| D | R600ISelLowering.h | 21 class R600InstrInfo; variable
32 const R600InstrInfo * TII;
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| D | R600ExpandSpecialInstrs.cpp | 30 const R600InstrInfo *TII;
34 TII (static_cast<const R600InstrInfo *>(tm.getInstrInfo())) { } in R600ExpandSpecialInstrsPass()
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| D | R600InstrInfo.h | 32 class R600InstrInfo : public AMDGPUInstrInfo {
40 explicit R600InstrInfo(AMDGPUTargetMachine &tm);
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| D | Makefile.sources | 67 R600InstrInfo.cpp \
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| D | AMDGPUTargetMachine.cpp | 60 InstrInfo = new R600InstrInfo(*this); in AMDGPUTargetMachine()
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| D | R600ISelLowering.cpp | 27 TII(static_cast<const R600InstrInfo*>(TM.getInstrInfo())) in R600TargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | R600InstrInfo.cpp | 31 R600InstrInfo::R600InstrInfo(const AMDGPUSubtarget &st) in R600InstrInfo() function in R600InstrInfo
34 const R600RegisterInfo &R600InstrInfo::getRegisterInfo() const { in getRegisterInfo()
38 bool R600InstrInfo::isTrig(const MachineInstr &MI) const { in isTrig()
42 bool R600InstrInfo::isVector(const MachineInstr &MI) const { in isVector()
47 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
82 bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, in isLegalToSplitMBBAt()
93 bool R600InstrInfo::isMov(unsigned Opcode) const { in isMov()
108 bool R600InstrInfo::isPlaceHolderOpcode(unsigned Opcode) const { in isPlaceHolderOpcode()
116 bool R600InstrInfo::isReductionOp(unsigned Opcode) const { in isReductionOp()
120 bool R600InstrInfo::isCubeOp(unsigned Opcode) const { in isCubeOp()
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| D | R600InstrInfo.h | 32 class R600InstrInfo : public AMDGPUInstrInfo {
61 explicit R600InstrInfo(const AMDGPUSubtarget &st);
120 const std::vector<R600InstrInfo::BankSwizzle> &Swz,
122 R600InstrInfo::BankSwizzle TransSwz) const;
126 std::vector<R600InstrInfo::BankSwizzle> &SwzCandidate,
128 R600InstrInfo::BankSwizzle TransSwz) const;
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| D | R600RegisterInfo.cpp | 31 const R600InstrInfo *TII = in getReservedRegs()
32 static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo()); in getReservedRegs()
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| D | R600Packetizer.cpp | 61 const R600InstrInfo *TII;
153 TII(static_cast<const R600InstrInfo *>( in R600PacketizerList()
236 std::vector<R600InstrInfo::BankSwizzle> &BS, in isBundlableWithCurrentPMI()
301 std::vector<R600InstrInfo::BankSwizzle> BS; in addToPacket()
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| D | R600ClauseMergePass.cpp | 48 const R600InstrInfo *TII;
171 TII = static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | R600EmitClauseMarkers.cpp | 38 const R600InstrInfo *TII;
301 TII = static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | AMDGPUSubtarget.cpp | 83 InstrInfo.reset(new R600InstrInfo(*this)); in AMDGPUSubtarget()
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| D | R600MachineScheduler.h | 30 const R600InstrInfo *TII;
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| D | CMakeLists.txt | 35 R600InstrInfo.cpp
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| D | R600ExpandSpecialInstrs.cpp | 35 const R600InstrInfo *TII;
69 TII = static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | R600ISelLowering.h | 22 class R600InstrInfo; variable
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| D | R600OptimizeVectorRegisters.cpp | 88 const R600InstrInfo *TII;
317 TII = static_cast<const R600InstrInfo *>(Fn.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | R600ISelLowering.cpp | 199 const R600InstrInfo *TII = in EmitInstrWithCustomInserter()
200 static_cast<const R600InstrInfo *>(Subtarget->getInstrInfo()); in EmitInstrWithCustomInserter()
655 const R600InstrInfo *TII = in LowerOperation()
656 static_cast<const R600InstrInfo *>(Subtarget->getInstrInfo()); in LowerOperation()
2058 const R600InstrInfo *TII = in FoldOperand()
2059 static_cast<const R600InstrInfo *>(DAG.getSubtarget().getInstrInfo()); in FoldOperand()
2183 const R600InstrInfo *TII = in PostISelFolding()
2184 static_cast<const R600InstrInfo *>(DAG.getSubtarget().getInstrInfo()); in PostISelFolding()
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| D | R600ControlFlowFinalizer.cpp | 220 const R600InstrInfo *TII;
477 TII = static_cast<const R600InstrInfo *>(ST->getInstrInfo()); in runOnMachineFunction()
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| D | R600Instructions.td | 91 // R600Defines.h, R600InstrInfo::buildDefaultInstruction(),
92 // and R600InstrInfo::getOperandIdx().
133 // R600InstrInfo::buildDefaultInstruction(), and R600InstrInfo::getOperandIdx().
172 // R600InstrInfo::buildDefaultInstruction(), and
173 // R600InstrInfo::getOperandIdx().
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| D | R600MachineScheduler.cpp | 30 TII = static_cast<const R600InstrInfo*>(DAG->TII); in initialize()
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| D | AMDGPUISelDAGToDAG.cpp | 55 const R600InstrInfo *TII);
56 bool FoldOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
57 bool FoldDotOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
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| D | AMDILCFGStructurizer.cpp | 165 TII = static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
187 const R600InstrInfo *TII;
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