| /external/skia/src/core/ |
| D | SkChecksum.h | 32 ROTL = sizeof(uintptr_t) * 8 - ROTR, enumerator
37 return ((total >> ROTR) | (total << ROTL)) ^ value; in Mash()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 186 SDValue ROTL = DAG.getNode(ISD::ROTL, DL, MVT::i32, SRL, in addIPMSequence() local
188 return ROTL; in addIPMSequence()
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| D | SystemZISelDAGToDAG.cpp | 752 case ISD::ROTL: { in expandRxSBG()
1082 case ISD::ROTL: in Select()
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| /external/boringssl/src/decrepit/cast/ |
| D | cast.c | 93 #define ROTL(a, n) (_lrotl(a, n)) macro
95 #define ROTL(a, n) ((((a) << (n)) | ((a) >> ((-(n))&31))) & 0xffffffffL) macro
102 t = ROTL(t, (key[n * 2 + 1])); \
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 323 SHL, SRA, SRL, ROTL, ROTR, enumerator
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600ISelLowering.cpp | 43 setOperationAction(ISD::ROTL, MVT::i32, Custom); in R600TargetLowering()
250 case ISD::ROTL: return LowerROTL(Op, DAG); in LowerOperation()
|
| /external/vboot_reference/firmware/2lib/ |
| D | 2sha256.c | 44 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| D | 2sha512.c | 44 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| /external/vboot_reference/firmware/lib/cryptolib/ |
| D | sha256.c | 45 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| D | sha512.c | 45 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 171 setOperationAction(ISD::ROTL, MVT::i64, Legal); in NVPTXTargetLowering()
174 setOperationAction(ISD::ROTL, MVT::i64, Expand); in NVPTXTargetLowering()
178 setOperationAction(ISD::ROTL, MVT::i32, Legal); in NVPTXTargetLowering()
181 setOperationAction(ISD::ROTL, MVT::i32, Expand); in NVPTXTargetLowering()
185 setOperationAction(ISD::ROTL, MVT::i16, Expand); in NVPTXTargetLowering()
187 setOperationAction(ISD::ROTL, MVT::i8, Expand); in NVPTXTargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 184 case ISD::ROTL: return "rotl"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 278 case ISD::ROTL: in LegalizeOp()
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| D | DAGCombiner.cpp | 1331 case ISD::ROTL: return visitRotate(N); in visit()
3359 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT)) in MatchBSwapHWord()
3360 return DAG.getNode(ISD::ROTL, SDLoc(N), VT, BSwap, ShAmt); in MatchBSwapHWord()
3767 bool HasROTL = TLI.isOperationLegalOrCustom(ISD::ROTL, VT); in MatchRotate()
3810 SDValue Rot = DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, in MatchRotate()
3853 LExtOp0, RExtOp0, ISD::ROTL, ISD::ROTR, DL); in MatchRotate()
3858 RExtOp0, LExtOp0, ISD::ROTR, ISD::ROTL, DL); in MatchRotate()
4005 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT)) in visitXOR()
4010 return DAG.getNode(ISD::ROTL, SDLoc(N), VT, DAG.getConstant(~1, VT), in visitXOR()
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| D | SelectionDAG.cpp | 2512 case ISD::ROTL: in ComputeNumSignBits()
3149 case ISD::ROTL: in FoldConstantArithmetic()
3291 case ISD::ROTL: in getNode()
6614 case ISD::ROTL: in UnrollVectorOp()
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| D | LegalizeIntegerTypes.cpp | 869 case ISD::ROTL: in PromoteIntegerOperand()
2532 case ISD::ROTL: in ExpandIntegerOperand()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 101 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
103 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 135 setOperationAction(ISD::ROTL, MVT::i64, Expand); in BPFTargetLowering()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 441 } else if (Opcode == ISD::ROTL) { in isRotateAndMask()
865 case ISD::ROTL: in getValueBits()
1916 case ISD::ROTL: in SelectBitPermutation()
2523 N->getOperand(0).getOpcode() != ISD::ROTL) { in Select()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1299 setOperationAction(ISD::ROTL, VT, Expand); in HexagonTargetLowering()
1739 setOperationAction(ISD::ROTL, MVT::i32, Expand); in HexagonTargetLowering()
1742 setOperationAction(ISD::ROTL, MVT::i64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 289 setOperationAction(ISD::ROTL, MVT::i32, Expand); in AMDGPUTargetLowering()
290 setOperationAction(ISD::ROTL, MVT::i64, Expand); in AMDGPUTargetLowering()
325 setOperationAction(ISD::ROTL, VT, Expand); in AMDGPUTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 852 // Convert a ROTL shamt to a ROTR shamt on 32-bit integer.
857 // Convert a ROTL shamt to a ROTR shamt on 64-bit integer.
|
| /external/valgrind/VEX/priv/ |
| D | guest_ppc_toIR.c | 1630 static IRExpr* /* :: Ity_I32/64 */ ROTL ( IRExpr* src, in ROTL() function
4664 r = ROTL( unop(Iop_64to32, mkexpr(rS) ), mkU8(sh_imm) ); in dis_int_rot()
4676 r = ROTL(mkexpr(rS), mkU8(sh_imm)); in dis_int_rot()
4698 r = ROTL( unop(Iop_64to32, mkexpr(rS) ), mkU8(sh_imm) ); in dis_int_rot()
4728 ROTL(mkexpr(rS), mkU8(sh_imm)), in dis_int_rot()
4746 r = ROTL( unop(Iop_64to32, mkexpr(rS)), in dis_int_rot()
4756 ROTL(mkexpr(rS), in dis_int_rot()
4774 r = ROTL( mkexpr(rS), unop(Iop_64to8, mkexpr(rB)) ); in dis_int_rot()
4795 r = ROTL(mkexpr(rS), mkU8(sh_imm)); in dis_int_rot()
4818 r = ROTL(mkexpr(rS), mkU8(sh_imm)); in dis_int_rot()
[all …]
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1479 setOperationAction(ISD::ROTL , MVT::i64, Expand); in SparcTargetLowering()
1533 setOperationAction(ISD::ROTL , MVT::i32, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 327 setOperationAction(ISD::ROTL, MVT::i32, Expand); in MipsTargetLowering()
328 setOperationAction(ISD::ROTL, MVT::i64, Expand); in MipsTargetLowering()
|