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Searched refs:RegUnit (Results 1 – 10 of 10) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DMachineRegisterInfo.h572 PSetIterator getPressureSets(unsigned RegUnit) const;
673 void setRegUnitUsed(unsigned RegUnit) { in setRegUnitUsed() argument
674 UsedRegUnits.set(RegUnit); in setRegUnitUsed()
1006 PSetIterator(unsigned RegUnit, const MachineRegisterInfo *MRI) { in PSetIterator() argument
1008 if (TargetRegisterInfo::isVirtualRegister(RegUnit)) { in PSetIterator()
1009 const TargetRegisterClass *RC = MRI->getRegClass(RegUnit); in PSetIterator()
1014 PSet = TRI->getRegUnitPressureSets(RegUnit); in PSetIterator()
1015 Weight = TRI->getRegUnitWeight(RegUnit); in PSetIterator()
1035 getPressureSets(unsigned RegUnit) const { in getPressureSets() argument
1036 return PSetIterator(RegUnit, this); in getPressureSets()
DLiveRegMatrix.h138 LiveIntervalUnion::Query &query(LiveInterval &VirtReg, unsigned RegUnit);
DRegisterPressure.h136 void addPressureChange(unsigned RegUnit, bool IsDec,
/external/llvm/lib/CodeGen/
DLiveRegMatrix.cpp167 unsigned RegUnit) { in query() argument
168 LiveIntervalUnion::Query &Q = Queries[RegUnit]; in query()
169 Q.init(UserTag, &VirtReg, &Matrix[RegUnit]); in query()
DRegisterPressure.cpp303 static bool containsReg(ArrayRef<unsigned> RegUnits, unsigned RegUnit) { in containsReg() argument
304 return std::find(RegUnits.begin(), RegUnits.end(), RegUnit) != RegUnits.end(); in containsReg()
386 void PressureDiff::addPressureChange(unsigned RegUnit, bool IsDec, in addPressureChange() argument
388 PSetIterator PSetI = MRI->getPressureSets(RegUnit); in addPressureChange()
DMachineTraceMetrics.cpp677 unsigned RegUnit; member
682 unsigned getSparseSetIndex() const { return RegUnit; } in getSparseSetIndex()
684 LiveRegUnit(unsigned RU) : RegUnit(RU), Cycle(0), MI(nullptr), Op(0) {} in LiveRegUnit()
1116 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle)); in computeInstrHeights()
1117 DEBUG(dbgs() << ' ' << PrintRegUnit(RI->RegUnit, MTM.TRI) in computeInstrHeights()
/external/llvm/utils/TableGen/
DCodeGenRegisters.h435 struct RegUnit { struct
450 RegUnit() : Weight(0), RegClassUnitSetsIdx(0) { in RegUnit() argument
499 SmallVector<RegUnit, 8> RegUnits;
646 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; } in getRegUnit()
647 const RegUnit &getRegUnit(unsigned RUID) const { return RegUnits[RUID]; } in getRegUnit()
DRegisterInfoEmitter.cpp215 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure()
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h603 MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) { in MCRegUnitRootIterator() argument
604 assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit"); in MCRegUnitRootIterator()
605 Reg0 = MCRI->RegUnitRoots[RegUnit][0]; in MCRegUnitRootIterator()
606 Reg1 = MCRI->RegUnitRoots[RegUnit][1]; in MCRegUnitRootIterator()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h420 bool hasRegUnit(unsigned Reg, unsigned RegUnit) const { in hasRegUnit() argument
422 if (*Units == RegUnit) in hasRegUnit()
655 virtual unsigned getRegUnitWeight(unsigned RegUnit) const = 0;
675 virtual const int *getRegUnitPressureSets(unsigned RegUnit) const = 0;