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/external/llvm/test/CodeGen/AArch64/
Darm64-fast-isel-rem.ll3 ; RUN: FileCheck %s < %t --check-prefix=CHECK-SSA
5 ; CHECK-SSA-LABEL: Machine code for function t1
7 ; CHECK-SSA: [[QUOTREG:%vreg[0-9]+]]<def> = SDIVWr
8 ; CHECK-SSA-NOT: [[QUOTREG]]<def> =
9 ; CHECK-SSA: {{%vreg[0-9]+}}<def> = MSUBWrrr [[QUOTREG]]
11 ; CHECK-SSA-LABEL: Machine code for function t2
/external/llvm/docs/HistoricalNotes/
D2001-06-01-GCCOptimizations.txt19 6 . *** Conversion to SSA
20 7 . [t] SSA Based DCE
33 things to reimplement would be SSA based PRE, Strength reduction & loop
41 SSA based optimizations that could be adapted (besides the fact that their
46 has been rerun... which causes me to wonder if the SSA generation code
D2001-06-01-GCCOptimizations2.txt22 could be faster, because we are using a "smarter" IR (SSA based).
24 > BTW, about SGI, "borrowing" SSA-based optimizations from one compiler and
29 more similar to LLVM than it is different in many respects (SSA based,
33 much less time consuming to adapt, say, SSA-PRE than to rewrite it.
35 > But your larger point is valid that adding SSA based optimizations is
D2000-12-06-MeetingSummary.txt10 variables in SSA form, as opposed to having a two dimensional namespace
11 of the original variable and the SSA instance subscript.
26 reconstructed from SSA form in linear time, that it would be an
73 'infinite' spaces that instructions operate in (SSA register numbers,
D2000-12-06-EncodingIdea.txt19 My guess is that most SSA references are to recent values (especially if
D2003-06-26-Reoptimizer2.txt8 in SSA form (kind of like LLVM's MachineInstrs.) Then re-allocate
101 3. Section 1 is the trace itself, in SSA form used by BinInterface,
D2001-07-06-LoweringIRForCodeGen.txt16 processor but have VM semantics otherwise, i.e., all operands are in SSA
D2001-02-13-Reference-Memory.txt32 SSA generation/PHI node insertion pass to build the dependencies
D2001-01-31-UniversalIRIdea.txt31 features that different languages select from. Also, using SSA with or
/external/llvm/lib/Transforms/Utils/
DSSAUpdater.cpp326 SSAUpdater &S, StringRef BaseName) : SSA(S) { in LoadAndStorePromoter()
337 SSA.Initialize(SomeVal->getType(), BaseName); in LoadAndStorePromoter()
371 SSA.AddAvailableValue(BB, SI->getOperand(0)); in run()
433 SSA.AddAvailableValue(BB, StoredValue); in run()
440 Value *NewVal = SSA.GetValueInMiddleOfBlock(ALoad->getParent()); in run()
/external/llvm/lib/Transforms/Scalar/
DLoopRotation.cpp148 SSAUpdater SSA; in RewriteUsesOfClonedInstructions() local
161 SSA.Initialize(OrigHeaderVal->getType(), OrigHeaderVal->getName()); in RewriteUsesOfClonedInstructions()
162 SSA.AddAvailableValue(OrigHeader, OrigHeaderVal); in RewriteUsesOfClonedInstructions()
163 SSA.AddAvailableValue(OrigPreheader, OrigPreHeaderVal); in RewriteUsesOfClonedInstructions()
194 SSA.RewriteUse(U); in RewriteUsesOfClonedInstructions()
DLICM.cpp744 Value *LiveInValue = SSA.GetValueInMiddleOfBlock(ExitBlock); in doExtraRewritesBeforeFinalDeletion()
922 SSAUpdater SSA(&NewPHIs); in promoteLoopAccessesToScalars() local
923 LoopPromoter Promoter(SomePtr, LoopUses, SSA, PointerMustAliases, ExitBlocks, in promoteLoopAccessesToScalars()
934 SSA.AddAvailableValue(Preheader, PreheaderLoad); in promoteLoopAccessesToScalars()
/external/llvm/docs/tutorial/
DLangImpl7.rst22 directly in `SSA
24 Since LLVM requires that the input code be in SSA form, this is a very
29 for your front-end to build SSA form: LLVM provides highly tuned and
36 To understand why mutable variables cause complexities in SSA
85 of this chapter is not to explain the details of SSA form. For more
91 *requires* that its IR be in SSA form: there is no "non-ssa" mode for
92 it. However, SSA construction requires non-trivial algorithms and data
100 be in SSA form, it does not require (or permit) memory objects to be in
101 SSA form. In the example above, note that the loads from G and H are
180 into SSA registers, inserting Phi nodes as appropriate. If you run this
[all …]
DOCamlLangImpl7.rst22 directly in `SSA
24 Since LLVM requires that the input code be in SSA form, this is a very
29 for your front-end to build SSA form: LLVM provides highly tuned and
36 To understand why mutable variables cause complexities in SSA
85 of this chapter is not to explain the details of SSA form. For more
91 *requires* that its IR be in SSA form: there is no "non-ssa" mode for
92 it. However, SSA construction requires non-trivial algorithms and data
100 be in SSA form, it does not require (or permit) memory objects to be in
101 SSA form. In the example above, note that the loads from G and H are
180 into SSA registers, inserting Phi nodes as appropriate. If you run this
[all …]
/external/llvm/test/Transforms/SimplifyCFG/
D2002-05-21-PHIElimination.ll5 ; Which is not valid SSA
/external/mesa3d/src/glsl/
DREADME127 Q: Why no SSA representation?
129 A: Converting an IR tree to SSA form makes dead code elmimination,
132 major questions as to how it would work. Do we do SSA on the scalar
152 IR backend, SSA does not appear to be that important to producing
153 excellent code, but we do expect to do some SSA-based optimizations
/external/llvm/include/llvm/Transforms/Utils/
DSSAUpdater.h135 SSAUpdater &SSA;
/external/icu/icu4c/source/data/translit/
DInterIndic_Tamil.txt66 \uE036→ஶ; # REMAP (indicExceptions.txt): ஶ→ஷ = LETTER SHA→LETTER SSA
67 \uE037→ஷ; # LETTER SSA
DTamil_InterIndic.txt48 ஷ→\uE037; # LETTER SSA
DMalayalam_InterIndic.txt59 ഷ→\uE037; # LETTER SSA
DGujarati_InterIndic.txt58 ષ→\uE037; # LETTER SSA
DKannada_InterIndic.txt64 ಷ→\uE037; # LETTER SSA
DOriya_InterIndic.txt59 ଷ→\uE037; # LETTER SSA
DTelugu_InterIndic.txt61 ష→\uE037; # LETTER SSA
DBengali_InterIndic.txt56 ষ→\uE037; # LETTER SSA

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