| /external/llvm/include/llvm/CodeGen/ |
| D | TargetSchedule.h | 35 MCSchedModel SchedModel; variable
44 …TargetSchedModel(): SchedModel(MCSchedModel::GetDefaultSchedModel()), STI(nullptr), TII(nullptr) {} in TargetSchedModel()
67 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } in getMCSchedModel()
82 unsigned getProcessorID() const { return SchedModel.getProcessorID(); } in getProcessorID()
85 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
93 return SchedModel.getNumProcResourceKinds(); in getNumProcResourceKinds()
98 return SchedModel.getProcResource(PIdx); in getProcResource()
105 return SchedModel.getProcResource(PIdx)->Name; in getResourceName()
140 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } in getMicroOpBufferSize()
145 return SchedModel.getProcResource(PIdx)->BufferSize; in getResourceBufferSize()
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| D | ScheduleDAGInstrs.h | 85 TargetSchedModel SchedModel; variable
169 const TargetSchedModel *getSchedModel() const { return &SchedModel; } in getSchedModel()
173 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) in getSchedClass()
174 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); in getSchedClass()
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| D | MachineScheduler.h | 547 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
563 const TargetSchedModel *SchedModel; variable
633 DAG(nullptr), SchedModel(nullptr), Rem(nullptr), Available(ID, Name+".A"), in SchedBoundary()
682 return RetiredMOps * SchedModel->getMicroOpFactor(); in getCriticalCount()
690 return std::max(CurrCycle * SchedModel->getLatencyFactor(), in getExecutedCount()
821 const TargetSchedModel *SchedModel);
826 const TargetSchedModel *SchedModel; variable
832 Context(C), SchedModel(nullptr), TRI(nullptr) {} in GenericSchedulerBase()
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| D | MachineTraceMetrics.h | 73 TargetSchedModel SchedModel; variable
380 unsigned Factor = SchedModel.getLatencyFactor(); in getCycles()
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| /external/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 31 return EnableSchedModel && SchedModel.hasInstrSchedModel(); in hasInstrSchedModel()
56 SchedModel = sm; in init()
61 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init()
63 ResourceLCM = SchedModel.IssueWidth; in init()
65 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; in init()
69 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
71 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; in init()
106 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
117 SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
159 return TII->defaultDefLatency(SchedModel, DefMI); in computeOperandLatency()
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| D | MachineScheduler.cpp | 1619 init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) { in init() argument
1621 if (!SchedModel->hasInstrSchedModel()) in init()
1623 RemainingCounts.resize(SchedModel->getNumProcResourceKinds()); in init()
1627 RemIssueCount += SchedModel->getNumMicroOps(I->getInstr(), SC) in init()
1628 * SchedModel->getMicroOpFactor(); in init()
1630 PI = SchedModel->getWriteProcResBegin(SC), in init()
1631 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in init()
1633 unsigned Factor = SchedModel->getResourceFactor(PIdx); in init()
1643 SchedModel = smodel; in init()
1645 if (SchedModel->hasInstrSchedModel()) { in init()
[all …]
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| D | MachineTraceMetrics.cpp | 60 SchedModel.init(ST.getSchedModel(), &ST, TII); in runOnMachineFunction()
63 SchedModel.getNumProcResourceKinds()); in runOnMachineFunction()
96 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getResources()
107 if (!SchedModel.hasInstrSchedModel()) in getResources()
109 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); in getResources()
114 PI = SchedModel.getWriteProcResBegin(SC), in getResources()
115 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { in getResources()
126 PRCycles[K] * SchedModel.getResourceFactor(K); in getResources()
135 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getProcResourceCycles()
148 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in Ensemble()
[all …]
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| D | MachineCombiner.cpp | 41 MCSchedModel SchedModel; member in __anonbe3a18ba0111::MachineCombiner
262 const MCSchedClassDesc *SC = SchedModel.getSchedClassDesc(Idx); in instr2instrSC()
410 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
411 TSchedModel.init(SchedModel, &STI, TII); in runOnMachineFunction()
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| D | ScheduleDAGInstrs.cpp | 65 SchedModel.init(ST.getSchedModel(), &ST, TII); in ScheduleDAGInstrs()
283 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse, in addPhysRegDataDeps()
322 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps()
401 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
446 dep.setLatency(SchedModel.computeOperandLatency(Def, DefOp, MI, OperIdx)); in addVRegUseDeps()
713 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
723 if (SchedModel.hasInstrSchedModel()) { in initSUnits()
726 PI = SchedModel.getWriteProcResBegin(SC), in initSUnits()
727 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { in initSUnits()
728 switch (SchedModel.getProcResource(PI->ProcResourceIdx)->BufferSize) { in initSUnits()
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| D | TargetInstrInfo.cpp | 769 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel &SchedModel, in defaultDefLatency() argument
774 return SchedModel.LoadLatency; in defaultDefLatency()
776 return SchedModel.HighLatency; in defaultDefLatency()
829 return defaultDefLatency(ItinData->SchedModel, DefMI); in computeDefOperandLatency()
872 defaultDefLatency(ItinData->SchedModel, DefMI)); in computeOperandLatency()
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| D | EarlyIfConversion.cpp | 583 MCSchedModel SchedModel; member in __anonfc1f82480211::EarlyIfConverter
691 unsigned CritLimit = SchedModel.MispredictPenalty/2; in shouldConvertIf()
786 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
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| D | ScoreboardHazardRecognizer.cpp | 81 IssueWidth = ItinData->SchedModel.IssueWidth; in ScoreboardHazardRecognizer()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.h | 47 const TargetSchedModel *SchedModel; variable
58 : SchedModel(SM), TotalPackets(0) { in VLIWResourceModel()
65 Packet.resize(SchedModel->getIssueWidth()); in VLIWResourceModel()
135 const TargetSchedModel *SchedModel; member
156 DAG(nullptr), SchedModel(nullptr), Available(ID, Name+".A"), in VLIWSchedBoundary()
169 SchedModel = smodel; in init()
192 const TargetSchedModel *SchedModel; variable
207 : DAG(nullptr), SchedModel(nullptr), Top(TopQID, "TopQ"), in ConvergingVLIWScheduler()
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| D | HexagonMachineScheduler.cpp | 130 if (Packet.size() >= SchedModel->getIssueWidth()) { in reserveResources()
200 SchedModel = DAG->getSchedModel(); in initialize()
202 Top.init(DAG, SchedModel); in initialize()
203 Bot.init(DAG, SchedModel); in initialize()
277 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
278 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
300 unsigned Width = SchedModel->getIssueWidth(); in bumpCycle()
343 IssueCount += SchedModel->getNumMicroOps(SU->getInstr()); in bumpNode()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64StorePairSuppress.cpp | 33 TargetSchedModel SchedModel; member in __anona1f81aa70111::AArch64StorePairSuppress
83 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
122 SchedModel.init(ST.getSchedModel(), &ST, TII); in runOnMachineFunction()
128 if (!SchedModel.hasInstrSchedModel()) { in runOnMachineFunction()
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| D | AArch64Schedule.td | 11 // const MachineInstr *MI and const TargetSchedModel *SchedModel
15 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
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| D | AArch64ConditionalCompares.cpp | 726 MCSchedModel SchedModel; member in __anon2dd089570211::AArch64ConditionalCompares
848 unsigned DelayLimit = SchedModel.MispredictPenalty * 3 / 4; in shouldConvert()
896 SchedModel = MF.getSubtarget().getSchedModel(); in runOnMachineFunction()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 111 MCSchedModel SchedModel; ///< Basic machine properties.
119 InstrItineraryData() : SchedModel(MCSchedModel::GetDefaultSchedModel()), in InstrItineraryData()
125 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F), in InstrItineraryData()
126 Itineraries(SchedModel.InstrItineraries) {} in InstrItineraryData()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSchedule.td | 162 // SchedModel ties these units to a processor for any stand-alone defs
164 // attached to a processor, so SchedModel is not needed.
170 SchedMachineModel SchedModel = ?;
185 SchedMachineModel SchedModel = ?;
223 // SchedModel silences warnings but is ignored.
227 SchedMachineModel SchedModel = ?;
232 // SchedModel ties these resources to a processor.
243 SchedMachineModel SchedModel = ?;
286 // type at the same time. This class is unaware of its SchedModel so
293 // SchedModel ties these resources to a processor.
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| D | TargetSubtargetInfo.h | 96 const TargetSchedModel *SchedModel) const { in resolveSchedClass() argument
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| /external/llvm/lib/Target/R600/ |
| D | SISchedule.td | 73 let SchedModel = SIFullSpeedModel in {
81 } // End SchedModel = SIFullSpeedModel
83 let SchedModel = SIQuarterSpeedModel in {
91 } // End SchedModel = SIQuarterSpeedModel
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| /external/llvm/lib/MC/ |
| D | MCSubtargetInfo.cpp | 108 const MCSchedModel SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
109 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 205 SchedModel = getSchedModelForCPU(CPUString); in initSubtargetFeatures()
333 return SchedModel.MispredictPenalty; in getMispredictionPenalty()
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| /external/llvm/lib/Target/X86/ |
| D | X86ScheduleSLM.td | 32 let SchedModel = SLMModel in {
233 } // SchedModel
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| D | X86SchedSandyBridge.td | 32 let SchedModel = SandyBridgeModel in {
250 } // SchedModel
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