| /external/llvm/lib/CodeGen/ |
| D | AllocationOrder.cpp | 31 const VirtRegMap &VRM, in AllocationOrder() argument
34 const MachineFunction &MF = VRM.getMachineFunction(); in AllocationOrder()
35 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo(); in AllocationOrder()
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM); in AllocationOrder()
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| D | LiveRangeEdit.cpp | 36 if (VRM) { in createEmptyIntervalFrom()
37 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createEmptyIntervalFrom()
45 if (VRM) { in createFrom()
46 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createFrom()
363 bool IsOriginal = VRM && VRM->getOriginal(LI->reg) == LI->reg; in eliminateDeadDefs()
372 VRM->setIsSplitFromReg(Dups.back()->reg, 0); in eliminateDeadDefs()
389 if (VRM) in MRI_NoteNewVirtualRegister()
390 VRM->grow(); in MRI_NoteNewVirtualRegister()
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| D | RegAllocPBQP.cpp | 129 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
133 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
140 VirtRegMap &VRM,
146 VirtRegMap &VRM) const;
553 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, in initializeGraph() argument
606 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); in initializeGraph()
630 VirtRegMap &VRM, Spiller &VRegSpiller) { in spillVReg() argument
633 LiveRangeEdit LRE(&LIS.getInterval(VReg), NewIntervals, MF, LIS, &VRM); in spillVReg()
656 VirtRegMap &VRM, in mapPBQPToRegAlloc() argument
667 VRM.clearAllVirt(); in mapPBQPToRegAlloc()
[all …]
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| D | RegAllocBasic.cpp | 194 if (!VRM->hasPhys(Spill.reg)) in spillInterferences()
202 LiveRangeEdit LRE(&Spill, SplitVRegs, *MF, *LIS, VRM); in spillInterferences()
226 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo); in selectOrSplit()
261 LiveRangeEdit LRE(&VirtReg, SplitVRegs, *MF, *LIS, VRM); in selectOrSplit()
283 SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM)); in runOnMachineFunction()
288 DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *VRM << "\n"); in runOnMachineFunction()
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| D | VirtRegMap.cpp | 165 VirtRegMap *VRM; member in __anon1700c3f70111::VirtRegRewriter
214 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
218 DEBUG(VRM->dump()); in runOnMachineFunction()
221 LIS->addKillFlags(VRM); in runOnMachineFunction()
230 getAnalysis<LiveDebugVariables>().emitDebugValues(VRM); in runOnMachineFunction()
234 VRM->clearAllVirt(); in runOnMachineFunction()
252 unsigned PhysReg = VRM->getPhys(VirtReg); in addMBBLiveIns()
355 VRM->getPhys(MO.getReg()) : in rewrite()
361 unsigned PhysReg = VRM->getPhys(VirtReg); in rewrite()
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| D | RegAllocBase.cpp | 62 VRM = &vrm; in init()
89 assert(!VRM->hasPhys(VirtReg->reg) && "Register already assigned"); in allocatePhysRegs()
130 VRM->assignVirt2Phys(VirtReg->reg, in allocatePhysRegs()
141 assert(!VRM->hasPhys(SplitVirtReg->reg) && "Register already assigned"); in allocatePhysRegs()
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| D | LiveRegMatrix.cpp | 54 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
102 assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment"); in assign()
103 VRM->assignVirt2Phys(VirtReg.reg, PhysReg); in assign()
118 unsigned PhysReg = VRM->getPhys(VirtReg.reg); in unassign()
121 VRM->clearVirt(VirtReg.reg); in unassign()
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| D | LiveDebugVariables.cpp | 266 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
269 void emitDebugValues(VirtRegMap *VRM,
354 void emitDebugValues(VirtRegMap *VRM);
925 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) { in rewriteLocations() argument
935 if (VRM.isAssignedReg(VirtReg) && in rewriteLocations()
936 TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) { in rewriteLocations()
940 Loc.substPhysReg(VRM.getPhys(VirtReg), TRI); in rewriteLocations()
941 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) { in rewriteLocations()
943 Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg)); in rewriteLocations()
998 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, in emitDebugValues() argument
[all …]
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| D | RegAllocBase.h | 63 VirtRegMap *VRM; variable
69 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {} in RegAllocBase()
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| D | RegAllocGreedy.cpp | 477 if (VRM->hasPhys(VirtReg)) { in LRE_CanEraseVirtReg()
489 if (!VRM->hasPhys(VirtReg)) in LRE_WillShrinkVirtReg()
569 if (VRM->hasKnownPreference(Reg)) in enqueue()
638 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo); in canReassign()
754 bool BreaksHint = VRM->hasPreferredPhys(Intf->reg); in canEvictInterference()
807 if (!VRM->hasPhys(Intf->reg)) in evictInterference()
1429 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this); in doRegionSplit()
1477 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this); in tryBlockSplit()
1549 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this); in tryInstructionSplit()
1872 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this); in tryLocalSplit()
[all …]
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| D | TargetRegisterInfo.cpp | 269 const VirtRegMap *VRM) const { in getRegAllocationHints()
280 if (VRM && isVirtualRegister(Phys)) in getRegAllocationHints()
281 Phys = VRM->getPhys(Phys); in getRegAllocationHints()
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| D | SplitKit.h | 45 const VirtRegMap &VRM; variable
214 VirtRegMap &VRM; variable
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| D | LiveDebugVariables.h | 59 void emitDebugValues(VirtRegMap *VRM);
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| D | AllocationOrder.h | 39 const VirtRegMap &VRM,
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| D | InlineSpiller.cpp | 65 VirtRegMap &VRM; member in __anonf7bb34900111::InlineSpiller
146 Loops(pass.getAnalysis<MachineLoopInfo>()), VRM(vrm), in InlineSpiller()
315 VRM.getOriginal(Reg) == Original; in isSibling()
1327 StackSlot = VRM.assignVirt2StackSlot(Original); in spillAll()
1334 VRM.assignVirt2StackSlot(Edit->getReg(), StackSlot); in spillAll()
1376 Original = VRM.getOriginal(edit.getReg()); in spill()
1377 StackSlot = VRM.getStackSlot(Original); in spill()
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| D | SplitKit.cpp | 45 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), in SplitAnalysis()
293 unsigned OrigReg = VRM.getOriginal(CurLI->reg); in isOriginalEndpoint()
321 : SA(sa), LIS(lis), VRM(vrm), MRI(vrm.getMachineFunction().getRegInfo()), in SplitEditor()
335 LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
338 LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
1100 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), SA.Loops, MBFI); in finish()
1171 MachineBasicBlock *MBB = VRM.getMachineFunction().getBlockNumbered(MBBNum); in splitLiveThroughBlock()
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| D | LiveIntervalAnalysis.cpp | 639 void LiveIntervals::addKillFlags(const VirtRegMap *VRM) { in addKillFlags() argument
657 for (MCRegUnitIterator Units(VRM->getPhys(Reg), TRI); Units.isValid(); in addKillFlags()
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| /external/llvm/include/llvm/CodeGen/ |
| D | VirtRegMap.h | 184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
185 VRM.print(OS);
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| D | LiveRangeEdit.h | 65 VirtRegMap *VRM; variable
119 VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), in Parent()
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| D | LiveRegMatrix.h | 43 VirtRegMap *VRM; variable
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 228 const VirtRegMap *VRM) const { in getRegAllocationHints()
241 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
255 } else if (VRM && VRM->hasPhys(Paired)) { in getRegAllocationHints()
256 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
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| D | ARMBaseRegisterInfo.h | 129 const VirtRegMap *VRM) const override;
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 695 const VirtRegMap *VRM = nullptr) const;
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